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| author | Jakub Jelinek <jakub@redhat.com> | 2020-04-08 18:24:12 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2020-04-08 18:24:12 +0200 |
| commit | 8bf5faa9c463f0d53ffe835ba03d4502edfb959d (patch) | |
| tree | 026440cd12565021038a2a84152fdf5701ece1e7 /gcc/cse.c | |
| parent | faa0817311f43e0d4d223d53c816b0c74ec35c4e (diff) | |
| download | gcc-8bf5faa9c463f0d53ffe835ba03d4502edfb959d.zip gcc-8bf5faa9c463f0d53ffe835ba03d4502edfb959d.tar.gz gcc-8bf5faa9c463f0d53ffe835ba03d4502edfb959d.tar.bz2 | |
i386: Don't use AVX512F integral masks for V*TImode [PR94438]
The ix86_get_mask_mode hook uses int mask for 512-bit vectors or 128/256-bit
vectors with AVX512VL (that is correct), and only for V*[SD][IF]mode if not
AVX512BW (also correct), but with AVX512BW it would stop checking the
elem_size altogether and pretend the hw has masking support for V*TImode
etc., which it doesn't. That can lead to various ICEs later on.
2020-04-08 Jakub Jelinek <jakub@redhat.com>
PR target/94438
* config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
1, 2, 4 and 8.
* gcc.target/i386/avx512bw-pr94438.c: New test.
* gcc.target/i386/avx512vlbw-pr94438.c: New test.
Diffstat (limited to 'gcc/cse.c')
0 files changed, 0 insertions, 0 deletions