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authorJames Greenhalgh <james.greenhalgh@arm.com>2017-09-12 14:57:58 +0000
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>2017-09-12 14:57:58 +0000
commitdb46a2e6583ef7c8b284702613c8bc1bfd08e42b (patch)
treec7cf6f2f53c2e1bcfdd2130b9da56e27d702c08a /gcc/cprop.c
parent89b2133e2b7ef072e5b378a82c697269d8cd1db9 (diff)
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[Patch AArch64 2/2] Fix memory sizes to load/store patterns
There seems to be a partial misconception in the AArch64 backend that load1/load2 referred to the number of registers to load, rather than the number of words to load. This patch fixes that using the new "number of byte" types added in the previous patch. That means using the load_16 and store_16 types that were defined in the previous patch for the first time in the AArch64 backend. To ensure continuity for scheduling models, I've just split this out from load_8. Please update your models if this is very wrong! --- gcc/ * config/aarch64/aarch64.md (movdi_aarch64): Set load/store types correctly. (movti_aarch64): Likewise. (movdf_aarch64): Likewise. (movtf_aarch64): Likewise. (load_pairdi): Likewise. (store_pairdi): Likewise. (load_pairdf): Likewise. (store_pairdf): Likewise. (loadwb_pair<GPI:mode>_<P:mode>): Likewise. (storewb_pair<GPI:mode>_<P:mode>): Likewise. (ldr_got_small_<mode>): Likewise. (ldr_got_small_28k_<mode>): Likewise. (ldr_got_tiny): Likewise. * config/aarch64/iterators.md (ldst_sz): New. (ldpstp_sz): Likewise. * config/aarch64/thunderx.md (thunderx_storepair): Split store_8 to store_16. (thunderx_load): Split load_8 to load_16. * config/aarch64/thunderx2t99.md (thunderx2t99_loadpair): Split load_8 to load_16. (thunderx2t99_storepair_basic): Split store_8 to store_16. * config/arm/xgene1.md (xgene1_load_pair): Split load_8 to load_16. (xgene1_store_pair): Split store_8 to store_16. * config/aarch64/falkor.md (falkor_ld_3_ld): Split load_8 to load_16. (falkor_st_0_st_sd): Split store_8 to store_16. From-SVN: r252026
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