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author | liuhongt <hongtao.liu@intel.com> | 2022-08-30 17:32:47 +0800 |
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committer | liuhongt <hongtao.liu@intel.com> | 2022-09-06 13:40:57 +0800 |
commit | 20288a0c89906ec21b90a3008a5bc98df1e69375 (patch) | |
tree | d18e5d2a157bbf2e614fa6122b2edf4e5971c7e2 /gcc/cppdefault.cc | |
parent | 47d2dcd1397bf02b79515c39438e0ea9898f9056 (diff) | |
download | gcc-20288a0c89906ec21b90a3008a5bc98df1e69375.zip gcc-20288a0c89906ec21b90a3008a5bc98df1e69375.tar.gz gcc-20288a0c89906ec21b90a3008a5bc98df1e69375.tar.bz2 |
Fix _mm512_cvt_roundps_ph to generate sae instruction.
zmm-version vcvtps2ph is special, it encodes {sae} in evex, but put
round control in the imm. For intrinsic _mm512_cvt_roundps_ph (a,
imm), imm contains both {sae} and round control, we need to separate
it in the assembly output since vcvtps2ph will ignore imm[3:7].
gcc/ChangeLog:
* config/i386/i386-builtin.def (IX86_BUILTIN_CVTPS2PH512):
Map to CODE_FOR_avx512f_vcvtps2ph512_mask_sae.
* config/i386/sse.md (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Extend to ..
(<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>): .. this.
(avx512f_vcvtps2ph512_mask_sae): New expander
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512f-vcvtps2ph-sae.c: New test.
Diffstat (limited to 'gcc/cppdefault.cc')
0 files changed, 0 insertions, 0 deletions