aarch64: Tighten aarch64_simd_mem_operand_p [PR115969]

aarch64_simd_mem_operand_p checked for a memory with a POST_INC
or REG address, but it didn't check what kind of register was
being used.  This meant that it allowed DImode FPRs as well as GPRs.

I wondered about rewriting it to use aarch64_classify_address,
but this one-line fix seemed simpler.  The structure then mirrors
the existing early exit in aarch64_classify_address itself:

  /* On LE, for AdvSIMD, don't support anything other than POST_INC or
     REG addressing.  */
  if (advsimd_struct_p
      && TARGET_SIMD
      && !BYTES_BIG_ENDIAN
      && (code != POST_INC && code != REG))
    return false;

gcc/
	PR target/115969
	* config/aarch64/aarch64.cc (aarch64_simd_mem_operand_p): Require
	the operand to be a legitimate memory_operand.

gcc/testsuite/
	PR target/115969
	* gcc.target/aarch64/pr115969.c: New test.

0 files changed, 0 insertions, 0 deletions