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author | Vladimir N. Makarov <vmakarov@redhat.com> | 2023-04-20 10:02:13 -0400 |
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committer | Vladimir N. Makarov <vmakarov@redhat.com> | 2023-04-20 11:05:33 -0400 |
commit | 1d2aa9a8cb8fd078af930347392cfdfc14e1551c (patch) | |
tree | da96939f6410edf0c7897fea85a6004fe2ad1300 /gcc/cp/tree.cc | |
parent | cae48a9d80790dcde6ae86122546c89a00d8bb4f (diff) | |
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[LRA]: Exclude some hard regs for multi-reg inout reload pseudos used in asm in different mode
See gcc.c-torture/execute/20030222-1.c. Consider the code for 32-bit (e.g. BE) target:
int i, v; long x; x = v; asm ("" : "=r" (i) : "0" (x));
We generate the following RTL with reload insns:
1. subreg:si(x:di, 0) = 0;
2. subreg:si(x:di, 4) = v:si;
3. t:di = x:di, dead x;
4. asm ("" : "=r" (subreg:si(t:di,4)) : "0" (t:di))
5. i:si = subreg:si(t:di,4);
If we assign hard reg of x to t, dead code elimination will remove insn #2
and we will use unitialized hard reg. So exclude the hard reg of x for t.
We could ignore this problem for non-empty asm using all x value but it is hard to
check that the asm are expanded into insn realy using x and setting r.
The old reload pass used the same approach.
gcc/ChangeLog
* lra-constraints.cc (match_reload): Exclude some hard regs for
multi-reg inout reload pseudos used in asm in different mode.
Diffstat (limited to 'gcc/cp/tree.cc')
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