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| author | YunQiang Su <syq@gcc.gnu.org> | 2024-06-10 14:31:12 +0800 |
|---|---|---|
| committer | YunQiang Su <syq@gcc.gnu.org> | 2024-06-13 09:44:37 +0800 |
| commit | f10896c8e5fe34e51ea61aaa4d4aaedb4677ff13 (patch) | |
| tree | e1de471131976166077e40d6c443ac11d6b177c7 /gcc/cp/parser.cc | |
| parent | e3e5fd0c24c9b82d824da27bf8455bb3654e8eff (diff) | |
| download | gcc-f10896c8e5fe34e51ea61aaa4d4aaedb4677ff13.zip gcc-f10896c8e5fe34e51ea61aaa4d4aaedb4677ff13.tar.gz gcc-f10896c8e5fe34e51ea61aaa4d4aaedb4677ff13.tar.bz2 | |
MIPS: Use FPU-enabled tune for mips32/mips64/mips64r2/mips64r3/mips64r5
Currently, the default tune value of mips32 is PROCESSOR_4KC, and
the default tune value of mips64/mips64r2/mips64r3/mips64r5 is
PROCESSOR_5KC. PROCESSOR_4KC and PROCESSOR_5KC are both FPU-less.
Let's use PROCESSOR_24KF1_1 for mips32, and PROCESSOR_5KF for mips64/
mips64r2/mips64r3/mips64r5.
We find this problem when we try to fix gcc.target/mips/movcc-3.c.
gcc:
* config/mips/mips-cpus.def: Use PROCESSOR_24KF1_1 for mips32;
Use PROCESSOR_5KF for mips64/mips64r2/mips64r3/mips64r5.
Diffstat (limited to 'gcc/cp/parser.cc')
0 files changed, 0 insertions, 0 deletions