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| author | Patrick O'Neill <patrick@rivosinc.com> | 2024-08-20 11:29:12 -0700 |
|---|---|---|
| committer | Patrick O'Neill <patrick@rivosinc.com> | 2024-08-27 10:01:18 -0700 |
| commit | a3dc5d2100a3d17a2d67805de6d0373847bca780 (patch) | |
| tree | b3be66b0a54fe44dfc9d072a26d0a73fba78a87f /gcc/cp/parser.cc | |
| parent | ac1f3a8901344759dc7c247d3749c74a0bb524b0 (diff) | |
| download | gcc-a3dc5d2100a3d17a2d67805de6d0373847bca780.zip gcc-a3dc5d2100a3d17a2d67805de6d0373847bca780.tar.gz gcc-a3dc5d2100a3d17a2d67805de6d0373847bca780.tar.bz2 | |
RISC-V: Handle case when constant vector construction target rtx is not a register
This manifests in RTL that is optimized away which causes runtime failures
in the testsuite. Update all patterns to use a temp result register if required.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vector): Use tmp register if
needed.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
Diffstat (limited to 'gcc/cp/parser.cc')
0 files changed, 0 insertions, 0 deletions