RISC-V: Implement .SAT_SUB for unsigned scalar int

As the middle support of .SAT_SUB committed,  implement the unsigned
scalar int of .SAT_SUB for the riscv backend.  Consider below example
code:

T __attribute__((noinline))        \
sat_u_sub_##T##_fmt_1 (T x, T y)   \
{                                  \
  return (x - y) & (-(T)(x >= y)); \
}

T __attribute__((noinline))       \
sat_u_sub_##T##_fmt_2 (T x, T y)  \
{                                 \
  return (x - y) & (-(T)(x > y)); \
}

DEF_SAT_U_SUB_FMT_1(uint64_t);
DEF_SAT_U_SUB_FMT_2(uint64_t);

Before this patch:
sat_u_sub_uint64_t_fmt_1:
        bltu    a0,a1,.L2
        sub     a0,a0,a1
        ret
.L2:
        li      a0,0
        ret

After this patch:
sat_u_sub_uint64_t_fmt_1:
        sltu    a5,a0,a1
        addi    a5,a5,-1
        sub     a0,a0,a1
        and     a0,a5,a0
        ret

ToDo:
Only above 2 forms of .SAT_SUB are support for now,  we will
support more forms of .SAT_SUB in the middle-end in short future.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/ChangeLog:

	* config/riscv/riscv-protos.h (riscv_expand_ussub): Add new func
	decl for ussub expanding.
	* config/riscv/riscv.cc (riscv_expand_ussub): Ditto but for impl.
	* config/riscv/riscv.md (ussub<mode>3): Add new pattern ussub
	for scalar modes.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat_arith.h: Add test macros and comments.
	* gcc.target/riscv/sat_u_sub-1.c: New test.
	* gcc.target/riscv/sat_u_sub-2.c: New test.
	* gcc.target/riscv/sat_u_sub-3.c: New test.
	* gcc.target/riscv/sat_u_sub-4.c: New test.
	* gcc.target/riscv/sat_u_sub-5.c: New test.
	* gcc.target/riscv/sat_u_sub-6.c: New test.
	* gcc.target/riscv/sat_u_sub-7.c: New test.
	* gcc.target/riscv/sat_u_sub-8.c: New test.
	* gcc.target/riscv/sat_u_sub-run-1.c: New test.
	* gcc.target/riscv/sat_u_sub-run-2.c: New test.
	* gcc.target/riscv/sat_u_sub-run-3.c: New test.
	* gcc.target/riscv/sat_u_sub-run-4.c: New test.
	* gcc.target/riscv/sat_u_sub-run-5.c: New test.
	* gcc.target/riscv/sat_u_sub-run-6.c: New test.
	* gcc.target/riscv/sat_u_sub-run-7.c: New test.
	* gcc.target/riscv/sat_u_sub-run-8.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>

0 files changed, 0 insertions, 0 deletions