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| author | Levy Hsu <admin@levyhsu.com> | 2024-05-09 16:50:56 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2024-05-15 12:46:51 +0800 |
| commit | a71f90c5a7ae2942083921033cb23dcd63e70525 (patch) | |
| tree | 75bb99a2ad0a90b04ebae731d0ba29f82f34135d /gcc/cp/parser.cc | |
| parent | c6cc6d4741a880109c4e0e64d5a189687fb526f6 (diff) | |
| download | gcc-a71f90c5a7ae2942083921033cb23dcd63e70525.zip gcc-a71f90c5a7ae2942083921033cb23dcd63e70525.tar.gz gcc-a71f90c5a7ae2942083921033cb23dcd63e70525.tar.bz2 | |
x86: Add 3-instruction subroutine vector shift for V16QI in ix86_expand_vec_perm_const_1 [PR107563]
Hi All
We've introduced a new subroutine in ix86_expand_vec_perm_const_1
to optimize vector shifting for the V16QI type on x86.
This patch uses a three-instruction sequence psrlw, psllw, and por
to handle specific vector shuffle operations more efficiently.
The change aims to improve assembly code generation for configurations
supporting SSE2.
Bootstrapped and tested on x86_64-linux-gnu, OK for trunk?
Best
Levy
gcc/ChangeLog:
PR target/107563
* config/i386/i386-expand.cc (expand_vec_perm_psrlw_psllw_por): New
subroutine.
(ix86_expand_vec_perm_const_1): Call expand_vec_perm_psrlw_psllw_por.
gcc/testsuite/ChangeLog:
PR target/107563
* g++.target/i386/pr107563-a.C: New test.
* g++.target/i386/pr107563-b.C: New test.
Diffstat (limited to 'gcc/cp/parser.cc')
0 files changed, 0 insertions, 0 deletions