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authorliuhongt <hongtao.liu@intel.com>2024-09-04 15:39:17 +0800
committerliuhongt <hongtao.liu@intel.com>2024-09-06 08:45:49 +0800
commita51f2fc0d80869ab079a93cc3858f24a1fd28237 (patch)
tree3204086de70f077c84cab3fa68987801adb3d011 /gcc/cp/parser.cc
parent1735917cee41fe680d9dd3c0c26b45520c17413a (diff)
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Handle const0_operand for *avx2_pcmp<mode>3_1.
*<avx512>_eq<mode>3<mask_scalar_merge_name>_1 supports nonimm_or_0_operand for op1 and op2, pass_combine would fail to lower avx512 comparision back to avx2 one when op1/op2 is const0_rtx. It's because the splitter only support nonimmediate_operand. Failed to match this instruction: (set (reg/i:V16QI 20 xmm0) (vec_merge:V16QI (const_vector:V16QI [ (const_int -1 [0xffffffffffffffff]) repeated x16 ]) (const_vector:V16QI [ (const_int 0 [0]) repeated x16 ]) (unspec:HI [ (reg:V16QI 105 [ a ]) (const_vector:V16QI [ (const_int 0 [0]) repeated x16 ]) (const_int 0 [0]) ] UNSPEC_PCMP))) The patch extend predicates of the splitter to handles that. gcc/ChangeLog: PR target/115517 * config/i386/sse.md (*avx2_pcmp<mode>3_1): Change predicate of operands[1] and operands[2] from nonimmdiate_operand to nonimm_or_0_operand. gcc/testsuite/ChangeLog: * gcc.target/i386/pr115517.c: New test.
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