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| author | Wilco Dijkstra <wilco.dijkstra@arm.com> | 2024-05-15 13:07:27 +0100 |
|---|---|---|
| committer | Wilco Dijkstra <wilco.dijkstra@arm.com> | 2024-05-15 13:26:07 +0100 |
| commit | 43fb827f259e6fdea39bc4021950c810be769d58 (patch) | |
| tree | 655fcad0407435ce58119fc4a9bd00073c663014 /gcc/cp/parser.cc | |
| parent | 9b7cad5884f21cc5783075be0043777448db3fab (diff) | |
| download | gcc-43fb827f259e6fdea39bc4021950c810be769d58.zip gcc-43fb827f259e6fdea39bc4021950c810be769d58.tar.gz gcc-43fb827f259e6fdea39bc4021950c810be769d58.tar.bz2 | |
AArch64: Use UZP1 instead of INS
Use UZP1 instead of INS when combining low and high halves of vectors.
UZP1 has 3 operands which improves register allocation, and is faster on
some microarchitectures.
gcc:
* config/aarch64/aarch64-simd.md (aarch64_combine_internal<mode>):
Use UZP1 instead of INS.
(aarch64_combine_internal_be<mode>): Likewise.
gcc/testsuite:
* gcc.target/aarch64/ldp_stp_16.c: Update to check for UZP1.
* gcc.target/aarch64/pr109072_1.c: Likewise.
* gcc.target/aarch64/vec-init-14.c: Likewise.
* gcc.target/aarch64/vec-init-9.c: Likewise.
Diffstat (limited to 'gcc/cp/parser.cc')
0 files changed, 0 insertions, 0 deletions