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| author | Qing Zhao <qing.zhao@oracle.com> | 2022-05-09 15:34:34 +0000 |
|---|---|---|
| committer | Qing Zhao <qing.zhao@oracle.com> | 2022-05-09 15:36:16 +0000 |
| commit | 0b86943aca51175968e40bbb6f2662dfe3fbfe59 (patch) | |
| tree | 63f1586005129c704a1b015f9bf907e194a59c66 /gcc/cp/optimize.cc | |
| parent | a742a5db601585c2a30252b215faa88dbc18e8db (diff) | |
| download | gcc-0b86943aca51175968e40bbb6f2662dfe3fbfe59.zip gcc-0b86943aca51175968e40bbb6f2662dfe3fbfe59.tar.gz gcc-0b86943aca51175968e40bbb6f2662dfe3fbfe59.tar.bz2 | |
i386: Adjust -fzero-call-used-regs to always use XOR [PR101891]
Currently on i386, -fzero-call-used-regs uses a pattern of:
XOR regA,regA
MOV regA,regB
MOV regA,regC
...
RET
However, this introduces both a register ordering dependency (e.g. the CPU
cannot clear regB without clearing regA first), and while greatly reduces
available ROP gadgets, it does technically leave a set of "MOV" ROP gadgets
at the end of functions (e.g. "MOV regA,regC; RET").
This patch will switch to always use XOR on i386:
XOR regA,regA
XOR regB,regB
XOR regC,regC
...
RET
gcc/ChangeLog:
PR target/101891
* config/i386/i386.cc (zero_call_used_regno_mode): use V2SImode
as a generic MMX mode instead of V4HImode.
(zero_all_mm_registers): Use SET to zero instead of MOV for
zeroing scratch registers.
(ix86_zero_call_used_regs): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/i386/zero-scratch-regs-1.c: Add -fno-stack-protector
-fno-PIC.
* gcc.target/i386/zero-scratch-regs-10.c: Adjust mov to xor.
* gcc.target/i386/zero-scratch-regs-13.c: Add -msse.
* gcc.target/i386/zero-scratch-regs-14.c: Adjust mov to xor.
* gcc.target/i386/zero-scratch-regs-15.c: Add -fno-stack-protector
-fno-PIC.
* gcc.target/i386/zero-scratch-regs-16.c: Likewise.
* gcc.target/i386/zero-scratch-regs-17.c: Likewise.
* gcc.target/i386/zero-scratch-regs-18.c: Add -fno-stack-protector
-fno-PIC, adjust mov to xor.
* gcc.target/i386/zero-scratch-regs-19.c: Add -fno-stack-protector
-fno-PIC.
* gcc.target/i386/zero-scratch-regs-2.c: Adjust mov to xor.
* gcc.target/i386/zero-scratch-regs-20.c: Add -msse.
* gcc.target/i386/zero-scratch-regs-21.c: Add -fno-stack-protector
-fno-PIC, Adjust mov to xor.
* gcc.target/i386/zero-scratch-regs-22.c: Adjust mov to xor.
* gcc.target/i386/zero-scratch-regs-23.c: Likewise.
* gcc.target/i386/zero-scratch-regs-26.c: Likewise.
* gcc.target/i386/zero-scratch-regs-27.c: Likewise.
* gcc.target/i386/zero-scratch-regs-28.c: Likewise.
* gcc.target/i386/zero-scratch-regs-3.c: Add -fno-stack-protector.
* gcc.target/i386/zero-scratch-regs-31.c: Adjust mov to xor.
* gcc.target/i386/zero-scratch-regs-4.c: Add -fno-stack-protector
-fno-PIC.
* gcc.target/i386/zero-scratch-regs-5.c: Adjust mov to xor.
* gcc.target/i386/zero-scratch-regs-6.c: Add -fno-stack-protector.
* gcc.target/i386/zero-scratch-regs-7.c: Likewise.
* gcc.target/i386/zero-scratch-regs-8.c: Adjust mov to xor.
* gcc.target/i386/zero-scratch-regs-9.c: Add -fno-stack-protector.
Diffstat (limited to 'gcc/cp/optimize.cc')
0 files changed, 0 insertions, 0 deletions