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| author | Pan Li <pan2.li@intel.com> | 2024-01-17 16:56:56 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2024-01-17 17:02:50 +0800 |
| commit | de4c9a27ba51e409e9d9e2a2827da53b1c979b09 (patch) | |
| tree | 88f75bd45840e1618f99436404b789cc139693c1 /gcc/cp/module.cc | |
| parent | 3359942417b02de88ae84d50aac232ac01ff9e15 (diff) | |
| download | gcc-de4c9a27ba51e409e9d9e2a2827da53b1c979b09.zip gcc-de4c9a27ba51e409e9d9e2a2827da53b1c979b09.tar.gz gcc-de4c9a27ba51e409e9d9e2a2827da53b1c979b09.tar.bz2 | |
RISC-V: Fix asm checks regression due to recent middle-end change
The recent middle-end change result in some asm check failures.
This patch would like to fix the asm check by adjust the times.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls/shift-1.c: Fix asm check
count.
* gcc.target/riscv/rvv/autovec/vls/shift-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/shift-3.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc/cp/module.cc')
0 files changed, 0 insertions, 0 deletions