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| author | Shaokun Zhang <zhangshaokun@hisilicon.com> | 2018-12-19 10:08:50 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2018-12-19 10:08:50 +0000 |
| commit | 5a8d95cc43f3ff425fa58bf4025a8527320fb46c (patch) | |
| tree | e3f95c34cc0f49950e1ab9641beb9660d0ded8ea /gcc/cp/expr.c | |
| parent | a62fd9ddaf60decd1dd2016220e142fd5c1d8b73 (diff) | |
| download | gcc-5a8d95cc43f3ff425fa58bf4025a8527320fb46c.zip gcc-5a8d95cc43f3ff425fa58bf4025a8527320fb46c.tar.gz gcc-5a8d95cc43f3ff425fa58bf4025a8527320fb46c.tar.bz2 | |
[aarch64] Correct architecture for tsv110.
For HiSilicon's tsv110 cpu core, it supports some v8_4A features, but
some mandatory features are not implemented.
2018-12-19 Shaokun Zhang <zhangshaokun@hisilicon.com>
* config/aarch64/aarch64-cores.def (tsv110): Fix architecture. This
part is really Armv8.2 with some permitted Armv8.4 extensions.
From-SVN: r267255
Diffstat (limited to 'gcc/cp/expr.c')
0 files changed, 0 insertions, 0 deletions