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authorAndrew Stubbs <ams@codesourcery.com>2020-10-02 15:12:50 +0100
committerAndrew Stubbs <ams@codesourcery.com>2022-10-03 15:25:27 +0100
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treecec7d9810d92434af43f7f10fda3dfbedf9757e8 /gcc/cp/constraint.cc
parentf41d1b39a6443fad38c36af34b1baa384954ca80 (diff)
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vect: while_ult for integer masks
Add a vector length parameter needed by amdgcn without breaking aarch64. All amdgcn vector masks are DImode, regardless of vector length, so we can't tell what length is implied simply from the operator mode. (Even if we used different integer modes there's no mode small enough to differenciate a 2 or 4 lane mask). Without knowing the intended length we end up using a mask with too many lanes enabled, which leads to undefined behaviour.. The extra operand is not added for vector mask types so AArch64 does not need to be adjusted. gcc/ChangeLog: * config/gcn/gcn-valu.md (while_ultsidi): Limit mask length using operand 3. * doc/md.texi (while_ult): Document new operand 3 usage. * internal-fn.cc (expand_while_optab_fn): Set operand 3 when lhs_type maps to a non-vector mode.
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