Double word logical operation clean-ups in i386.md.

This patch tidies up and unifies doubleword handling in i386.md;
converting all doubleword splitters for logic operations to post-reload
form, generalizing their define_insn_and_split templates to <dwi> form
(supporting TARGET_64BIT ? TImode : DImode), and where required tweaking
the corresponding expanders to use SDWIM to support TImode doubleword
operations.

2022-07-01  Roger Sayle  <roger@nextmovesoftware.com>
	    Uroš Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog
	* config/i386/i386.md (general_szext_operand): Add TImode
	support using x86_64_hilo_general_operand predicate.
	(*cmp<dwi>_doubleword): Use x86_64_hilo_general_operand predicate.
	(*add<dwi>3_doubleword): Improved optimization of zero addition.
	(and<mode>3): Use SDWIM mode iterator to add support for double
	word bit-wise AND in TImode.  Use force_reg when double word
	immediate operand isn't x86_64_hilo_general_operand.
	(and<dwi>3_doubleword): Generalized from anddi3_doubleword and
	converted into a post-reload splitter.
	(*andndi3_doubleword): Previous define_insn deleted.
	(*andn<mode>3_doubleword_bmi): New define_insn_and_split for
	TARGET_BMI that splits post-reload.
	(*andn<mode>3_doubleword): New define_insn_and_split for
	!TARGET_BMI, that lowers/splits before reload.
	(<any_or><mode>3): Use SDWIM mode iterator to add suppport for
	double word bit-wise XOR and bit-wise IOR in TImode.  Use
	force_reg when double word immediate operand isn't
	x86_64_hilo_general_operand.
	(*<any_or>di3_doubleword): Generalized from <any_or>di3_doubleword.
	(one_cmpl<mode>2): Use SDWIM mode iterator to add support for
	double word bit-wise NOT in TImode.
	(one_cmpl<dwi>2_doubleword): Generalize from one_cmpldi2_doubleword
	and converted into a post-reload splitter.

0 files changed, 0 insertions, 0 deletions