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author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-05-10 10:40:06 +0100 |
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committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-05-10 10:42:22 +0100 |
commit | d1e7f9993084b87e6676a5ccef3c8b7f807a6013 (patch) | |
tree | d23b8af6329899110564f65cae7e610bcc05c6b0 /gcc/cp/constexpr.cc | |
parent | 39d6d4256d16d676f8b9031c4d1d115ddf4ad76b (diff) | |
download | gcc-d1e7f9993084b87e6676a5ccef3c8b7f807a6013.zip gcc-d1e7f9993084b87e6676a5ccef3c8b7f807a6013.tar.gz gcc-d1e7f9993084b87e6676a5ccef3c8b7f807a6013.tar.bz2 |
aarch64: PR target/99195 annotate simple narrowing patterns for vec-concat-zero
This patch cleans up some almost-duplicate patterns for the XTN, SQXTN, UQXTN instructions.
Using the <vczle><vczbe> attributes we can remove the BYTES_BIG_ENDIAN and !BYTES_BIG_ENDIAN cases,
as well as the intrinsic expanders that select between the two.
Tests are also added. Thankfully the diffstat comes out negative \O/.
Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.
gcc/ChangeLog:
PR target/99195
* config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
(aarch64_xtn<mode>_insn_be): Likewise.
(trunc<mode><Vnarrowq>2): Rename to...
(trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
(aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
(aarch64_<su>qmovn<mode>): Likewise.
(aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
(aarch64_<su>qmovn<mode>_insn_le): Delete.
(aarch64_<su>qmovn<mode>_insn_be): Likewise.
gcc/testsuite/ChangeLog:
PR target/99195
* gcc.target/aarch64/simd/pr99195_4.c: Add tests for vmovn, vqmovn.
Diffstat (limited to 'gcc/cp/constexpr.cc')
0 files changed, 0 insertions, 0 deletions