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| author | Patrick O'Neill <patrick@rivosinc.com> | 2023-04-05 09:46:37 -0700 |
|---|---|---|
| committer | Patrick O'Neill <patrick@rivosinc.com> | 2023-05-02 13:08:03 -0700 |
| commit | d199d2e56da2379004e7e0457150409c0c99d3e6 (patch) | |
| tree | 8ca8443b6efb35e193d43c14d8b066b339f49d34 /gcc/cp/constexpr.cc | |
| parent | 4990cf84c460f064d6281d0813f20b0ef20c7448 (diff) | |
| download | gcc-d199d2e56da2379004e7e0457150409c0c99d3e6.zip gcc-d199d2e56da2379004e7e0457150409c0c99d3e6.tar.gz gcc-d199d2e56da2379004e7e0457150409c0c99d3e6.tar.bz2 | |
RISC-V: Enforce atomic compare_exchange SEQ_CST
This patch enforces SEQ_CST for atomic compare_exchange ops.
Replace Fence/LR.aq/SC.aq pairs with SEQ_CST LR.aqrl/SC.rl pairs
recommended by table A.6 of the ISA manual.
2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
gcc/ChangeLog:
* config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
pair.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
Diffstat (limited to 'gcc/cp/constexpr.cc')
0 files changed, 0 insertions, 0 deletions