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| author | Pan Li <pan2.li@intel.com> | 2023-07-27 10:34:57 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-07-27 20:04:14 +0800 |
| commit | d0ae71c26ab9e383768160ea266f56db2e2ae43c (patch) | |
| tree | 59793184c1002044218bb35f4209b57c7cf9795d /gcc/cp/constexpr.cc | |
| parent | cdc65458334faad1a2f00cf17e64e39b25d697ca (diff) | |
| download | gcc-d0ae71c26ab9e383768160ea266f56db2e2ae43c.zip gcc-d0ae71c26ab9e383768160ea266f56db2e2ae43c.tar.gz gcc-d0ae71c26ab9e383768160ea266f56db2e2ae43c.tar.bz2 | |
RISC-V: Remove unnecessary vread_csr/vwrite_csr intrinsic.
According to below RVV doc, the related intrinsic is not longer needed.
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/249
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
(vread_csr): Ditto.
(vwrite_csr): Ditto.
Diffstat (limited to 'gcc/cp/constexpr.cc')
0 files changed, 0 insertions, 0 deletions