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| author | Georg-Johann Lay <avr@gjlay.de> | 2023-06-11 13:54:14 +0200 |
|---|---|---|
| committer | Georg-Johann Lay <avr@gjlay.de> | 2023-06-11 13:54:14 +0200 |
| commit | 3443d4ba043a5d2545107d501c6ea7c1112f04dd (patch) | |
| tree | b8f1e4894ac35529eb0506f069e7c4726aef65d9 /gcc/cp/constexpr.cc | |
| parent | 20643513b8dd34c07f2b0fccf119153a30735f66 (diff) | |
| download | gcc-3443d4ba043a5d2545107d501c6ea7c1112f04dd.zip gcc-3443d4ba043a5d2545107d501c6ea7c1112f04dd.tar.gz gcc-3443d4ba043a5d2545107d501c6ea7c1112f04dd.tar.bz2 | |
Use canonical form for reversed single-bit insertions after reload.
We now split almost all insns after reload in order to add clobber of REG_CC.
If insns are coming from insn combiner and there is no canonical form for
the respective arithmetic (like for reversed bit insertions), there is
no need to keep all these different representations after reload:
Instead of splitting such patterns to their clobber-REG_CC-analogon, we can
split to a canonical representation, which is insv_notbit for the present case.
This is a no-op change.
gcc/
* config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
Remove attribute values.
(insv_notbit): New post-reload insn.
(*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
(*insv.not-bit.0_split, *insv.not-bit.7_split)
(*insv.xor-extract_split): Split to insv_notbit.
(*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
(*insv.xor-extract): Remove post-reload insns.
* config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
(avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
[ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
* config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
Diffstat (limited to 'gcc/cp/constexpr.cc')
0 files changed, 0 insertions, 0 deletions