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| author | Richard Sandiford <richard.sandiford@arm.com> | 2020-08-05 14:49:32 +0100 |
|---|---|---|
| committer | Giuliano Belinassi <giuliano.belinassi@usp.br> | 2020-08-17 15:07:39 -0300 |
| commit | 7d823797d2298e12a56c79504a5d255894cd32c8 (patch) | |
| tree | 06dd0c646fa73f1dcc45074104f844db0a13374b /gcc/cp/constexpr.c | |
| parent | f072878bf9d4cf529d18158808c38e35661d19a0 (diff) | |
| download | gcc-7d823797d2298e12a56c79504a5d255894cd32c8.zip gcc-7d823797d2298e12a56c79504a5d255894cd32c8.tar.gz gcc-7d823797d2298e12a56c79504a5d255894cd32c8.tar.bz2 | |
aarch64: Add missing %z prefixes to LDP/STP patterns
For LDP/STP Q, the memory operand might not be valid for "m",
so we need to use %z<N> instead of %<N> in the asm template.
This patch does that for all Ump LDP/STP patterns, regardless
of whether it's strictly needed.
This is needed to unbreak bootstrap.
2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>)
(load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf)
(store_pair_sw_<SX:mode><SX2:mode>)
(store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf)
(*load_pair_extendsidi2_aarch64)
(*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand.
* config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>)
(vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>)
(vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
Diffstat (limited to 'gcc/cp/constexpr.c')
0 files changed, 0 insertions, 0 deletions