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authorWill Schmidt <will_schmidt@vnet.ibm.com>2020-05-21 15:21:34 -0500
committerGiuliano Belinassi <giuliano.belinassi@usp.br>2020-08-17 13:20:17 -0300
commit25e165faa12d660eb1a5d38101a37748cb2e888c (patch)
tree9f8233a71a7af5759921d9afafe68d4f2f8dfe89 /gcc/cp/constexpr.c
parentcd06fe62d67fe2758bdbc47b6ce41abec10c27ba (diff)
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[PATCH] RS6000 Add testlsbb by Byte operations
Add support for new instructions to test LSB by Byte. 2020-07-29 Will Schmidt <will_schmidt@vnet.ibm.com> gcc/ChangeLog: * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define. (vec_test_lsbb_all_zeros): New define. * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in handling macro. (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines. (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads. * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS, P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries. * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec. * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define. (xvtlsbbo, xvtlsbbz): New instruction expands. gcc/testsuite/ChangeLog: * gcc.target/powerpc/lsbb-runnable.c: New test. * gcc.target/powerpc/lsbb.c: New test.
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