[ARM] Add support for TLS register based stack protector canary access

Add support for accessing the stack canary value via the TLS register,
so that multiple threads running in the same address space can use
distinct canary values. This is intended for the Linux kernel running in
SMP mode, where processes entering the kernel are essentially threads
running the same program concurrently: using a global variable for the
canary in that context is problematic because it can never be rotated,
and so the OS is forced to use the same value as long as it remains up.

Using the TLS register to index the stack canary helps with this, as it
allows each CPU to context switch the TLS register along with the rest
of the process, permitting each process to use its own value for the
stack canary.

gcc/ChangeLog:

	* config/arm/arm-opts.h (enum stack_protector_guard): New.
	* config/arm/arm-protos.h (arm_stack_protect_tls_canary_mem):
	New.
	* config/arm/arm.cc (TARGET_STACK_PROTECT_GUARD): Define.
	(arm_option_override_internal): Handle and put in error checks.
	for stack protector guard options.
	(arm_option_reconfigure_globals): Likewise.
	(arm_stack_protect_tls_canary_mem): New.
	(arm_stack_protect_guard): New.
	* config/arm/arm.md (stack_protect_set): New.
	(stack_protect_set_tls): Likewise.
	(stack_protect_test): Likewise.
	(stack_protect_test_tls): Likewise.
	(reload_tp_hard): Likewise.
	* config/arm/arm.opt (-mstack-protector-guard): New
	(-mstack-protector-guard-offset): New.
	* doc/invoke.texi: Document new options.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/stack-protector-7.c: New test.
	* gcc.target/arm/stack-protector-8.c: New test.

0 files changed, 0 insertions, 0 deletions