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| author | Richard Sandiford <richard.sandiford@arm.com> | 2019-09-30 15:23:30 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2019-09-30 15:23:30 +0000 |
| commit | 51051f474a768d285714d713f1b7535d6a139350 (patch) | |
| tree | 2d51c313466b59810bdc099b5211c548a806233f /gcc/coverage.c | |
| parent | 4baad9863a5df7ec01b42afecd4170f4d58a1aac (diff) | |
| download | gcc-51051f474a768d285714d713f1b7535d6a139350.zip gcc-51051f474a768d285714d713f1b7535d6a139350.tar.gz gcc-51051f474a768d285714d713f1b7535d6a139350.tar.bz2 | |
[AArch64] Strengthen aarch64_hard_regno_call_part_clobbered
The aarch64_vector_pcs handling in aarch64_hard_regno_call_part_clobbered
checks whether the mode might be bigger than 16 bytes, since on SVE
targets the (non-SVE) vector PCS only guarantees that the low 16 bytes
are preserved. But for multi-register modes, we should instead test
whether each single-register part might be bigger than 16 bytes.
(The size is always divided evenly between registers.)
The testcase uses XImode as an example where this helps.
2019-09-30 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered):
For multi-registers modes, test how big each register part is.
gcc/testsuite/
* gcc.target/aarch64/torture/simd-abi-8.c: New test.
From-SVN: r276305
Diffstat (limited to 'gcc/coverage.c')
0 files changed, 0 insertions, 0 deletions