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| author | Andrew Stubbs <ams@baylibre.com> | 2025-07-09 15:00:43 +0000 |
|---|---|---|
| committer | Andrew Stubbs <ams@baylibre.com> | 2025-07-30 12:59:18 +0000 |
| commit | 37b44f7743e65f0e514810780f041bb07470c641 (patch) | |
| tree | c9c57cdccef0c7afa3b1c9775b0f824257ecfaa0 /gcc/coverage.c | |
| parent | f29755bd903a1234cff76066fb24793451b06524 (diff) | |
| download | gcc-37b44f7743e65f0e514810780f041bb07470c641.zip gcc-37b44f7743e65f0e514810780f041bb07470c641.tar.gz gcc-37b44f7743e65f0e514810780f041bb07470c641.tar.bz2 | |
amdgcn: Fix various unrecognized pattern issues with add<mode>3_vcc_dup
The patterns did not accept inline immediate constants, even though the
hardware instructions do, which has lead to some errors in some patches I'm
working on.
Also the VCC update RTL was using the wrong operands in the wrong places. This
appears to have been harmless(?) but is definitely not intended.
gcc/ChangeLog:
* config/gcn/gcn-valu.md (add<mode>3_vcc_dup<exec_vcc>): Change
operand 2 to allow gcn_alu_operand. Swap the operands in the VCC
update RTL.
(add<mode>3_vcc_zext_dup): Likewise.
(add<mode>3_vcc_zext_dup_exec): Likewise.
(add<mode>3_vcc_zext_dup2): Likewise.
(add<mode>3_vcc_zext_dup2_exec): Likewise.
(cherry picked from commit 4a0967f7509b5fad1c9bda432f71deb0d342a879)
Diffstat (limited to 'gcc/coverage.c')
0 files changed, 0 insertions, 0 deletions