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authorChao-ying Fu <fu@mips.com>2010-11-05 00:26:14 +0000
committerChao-ying Fu <chaoyingfu@gcc.gnu.org>2010-11-05 00:26:14 +0000
commit293b77b0578cf252c527d325913f08eadde5e2d5 (patch)
tree6b8bba7d8f858fae48851ba021aa3c36731bd2e8 /gcc/configure.ac
parent1ea3db46777d599b519d267897435760c4932f1d (diff)
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configure.ac: Test assembler support for DSP Rev1 mult.
2010-11-04 Chao-ying Fu <fu@mips.com> * configure.ac: Test assembler support for DSP Rev1 mult. * configure: Regenerate. * config.in: Regenerate. * config/mips/mips.h (ISA_HAS_DSP_MULT): New define. * config/mips/mips.c (CODE_FOR_mips_mult): New define. (CODE_FOR_mips_multu): New define. (mips_builtins): Move madd, maddu, msub, msubu, mult, multu from dspr2_32 to dsp_32. (mips_mulsidi3_gen_fn): Test (TARGET_FIX_R4000 && !ISA_HAS_DSP). Delete returns when ISA_HAS_DSPR2, because the old patterns are deleted. * config/mips/mips-dsp.md (mips_madd<u>, mips_msub<u>): New define_expand patterns. * config/mips/constraints.md (ka): Update the constraint to test ISA_HAS_DSP_MULT instead of ISA_HAS_DSPR2. * config/mips/mips-dspr2.md (mips_madd<u>, mips_msub<u>, mips_mult, mips_multu): Delete. * config/mips/mips.md (<u>mulsidi3_32bit): Add comments. Change target constraint to "ka". Use (!TARGET_FIX_R4000 || ISA_HAS_DSP), instead of (!TARGET_FIX_R4000 && !ISA_HAS_DSPR2). Emit the accumulator destination when ISA_HAS_DSP_MULT. (<u>msubsidi4): Add comments. Test ISA_HAS_DSP. Emit the accumulator destination when ISA_HAS_DSP_MULT. (<u>maddsidi4): Likewise. * doc/extend.texi (MIPS DSP Built-in Functions): Move madd, maddu, msub, msubu, mult, multu built-in functions from DSP r2 to DSP r1. From-SVN: r166344
Diffstat (limited to 'gcc/configure.ac')
-rw-r--r--gcc/configure.ac14
1 files changed, 14 insertions, 0 deletions
diff --git a/gcc/configure.ac b/gcc/configure.ac
index cc40042..a61e5f1 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -3654,6 +3654,20 @@ x:
[AC_DEFINE(HAVE_AS_DTPRELWORD, 1,
[Define if your assembler supports .dtprelword.])])
+ gcc_GAS_CHECK_FEATURE([DSPR1 mult with four accumulators support],
+ gcc_cv_as_mips_dspr1_mult,,,
+[ .set mips32r2
+ .set nodspr2
+ .set dsp
+ madd $ac3,$4,$5
+ maddu $ac3,$4,$5
+ msub $ac3,$4,$5
+ msubu $ac3,$4,$5
+ mult $ac3,$4,$5
+ multu $ac3,$4,$5],,
+ [AC_DEFINE(HAVE_AS_DSPR1_MULT, 1,
+ [Define if your assembler supports DSPR1 mult.])])
+
AC_MSG_CHECKING(assembler and linker for explicit JALR relocation)
gcc_cv_as_ld_jalr_reloc=no
if test $gcc_cv_as_mips_explicit_relocs = yes; then