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author | Alexandre Oliva <oliva@adacore.com> | 2021-05-04 21:49:41 -0300 |
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committer | Alexandre Oliva <oliva@gnu.org> | 2021-05-04 21:49:41 -0300 |
commit | 9aed32cc8f1baca398a203ddf4df2f80f43562c1 (patch) | |
tree | 5a1c8eca18ceaeefe5747834a9f564268b3621fd /gcc/config | |
parent | 99e8df7a4cc0bb1bfa49e69ccb0f7e02c9755e3c (diff) | |
download | gcc-9aed32cc8f1baca398a203ddf4df2f80f43562c1.zip gcc-9aed32cc8f1baca398a203ddf4df2f80f43562c1.tar.gz gcc-9aed32cc8f1baca398a203ddf4df2f80f43562c1.tar.bz2 |
restore EH on x86-vx7r2
x86-vx7r2 needs svr4_dbx_register_map, but the default in i386/i386.h
was dbx_register_map, partially swapping ebp and esp in unwind info.
i386/vxworks.h had a correct overrider, but it was conditional for
vxworks < 7. This patch reenables the overrider unconditionally.
for gcc/ChangeLog
* config/i386/vxworks.h (DBX_REGISTER_NUMBER): Make it
unconditional.
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/i386/vxworks.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/gcc/config/i386/vxworks.h b/gcc/config/i386/vxworks.h index b3ca224..ebda7d9 100644 --- a/gcc/config/i386/vxworks.h +++ b/gcc/config/i386/vxworks.h @@ -37,13 +37,6 @@ along with GCC; see the file COPYING3. If not see #define TARGET_SUBTARGET_DEFAULT \ (MASK_80387 | MASK_IEEE_FP | MASK_FLOAT_RETURNS | MASK_VECT8_RETURNS) -/* Provide our target specific DBX_REGISTER_NUMBER. VxWorks relies on - the SVR4 numbering. */ - -#undef DBX_REGISTER_NUMBER -#define DBX_REGISTER_NUMBER(n) \ - (TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n]) - #undef PTRDIFF_TYPE #define PTRDIFF_TYPE (TARGET_LP64 ? "long int" : "int") @@ -61,6 +54,13 @@ along with GCC; see the file COPYING3. If not see #endif +/* Provide our target specific DBX_REGISTER_NUMBER. VxWorks relies on + the SVR4 numbering. */ + +#undef DBX_REGISTER_NUMBER +#define DBX_REGISTER_NUMBER(n) \ + (TARGET_64BIT ? dbx64_register_map[n] : svr4_dbx_register_map[n]) + /* CPU macro definitions, ordered to account for VxWorks 7 not supporting CPUs older than PENTIUM4 since SR0650. */ |