aboutsummaryrefslogtreecommitdiff
path: root/gcc/config
diff options
context:
space:
mode:
authorJulia Koval <julia.koval@intel.com>2017-12-05 08:11:58 +0100
committerKirill Yukhin <kyukhin@gcc.gnu.org>2017-12-05 07:11:58 +0000
commit9896696391d7b9ddcc3bd4631d18877f14edd557 (patch)
tree8a01edbd0d9de34378f07e98c252ddedf323ff97 /gcc/config
parentae4bb13f0d8bd4d630a47f04ff5b7e60274a0a9b (diff)
downloadgcc-9896696391d7b9ddcc3bd4631d18877f14edd557.zip
gcc-9896696391d7b9ddcc3bd4631d18877f14edd557.tar.gz
gcc-9896696391d7b9ddcc3bd4631d18877f14edd557.tar.bz2
Enable VNNI support [1/5]
gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VNNI_SET, OPTION_MASK_ISA_AVX512VNNI_UNSET): New. (ix86_handle_option): Handle -mavx512vnni. * config/i386/cpuid.h (bit_AVX512VNNI): New bit. * config/i386/driver-i386.c (host_detect_local_cpu): Handle new bit. * config/i386/i386-c (__AVX512VNNI__): New. * config/i386/i386.c (ix86_target_string): Handle new option. (ix86_valid_target_attribute_inner_p): Handle new option. * config/i386/i386.h (TARGET_AVX512VNNI, TARGET_AVX512VNNI_P): New. * config/i386/i386.opt (mavx512vnni): New option. From-SVN: r255401
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/i386/cpuid.h1
-rw-r--r--gcc/config/i386/driver-i386.c5
-rw-r--r--gcc/config/i386/i386-c.c2
-rw-r--r--gcc/config/i386/i386.c2
-rw-r--r--gcc/config/i386/i386.h2
-rw-r--r--gcc/config/i386/i386.opt4
6 files changed, 15 insertions, 1 deletions
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index 4fad5d2..3c992a8 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -100,6 +100,7 @@
#define bit_AVX512VBMI2 (1 << 6)
#define bit_SHSTK (1 << 7)
#define bit_GFNI (1 << 8)
+#define bit_AVX512VNNI (1 << 11)
#define bit_AVX512VPOPCNTDQ (1 << 14)
#define bit_RDPID (1 << 22)
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index cfa8bd4..a6bafb1 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -417,6 +417,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
unsigned int has_avx5124fmaps = 0, has_avx5124vnniw = 0;
unsigned int has_gfni = 0, has_avx512vbmi2 = 0;
unsigned int has_ibt = 0, has_shstk = 0;
+ unsigned int has_avx512vnni = 0;
bool arch;
@@ -506,6 +507,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_avx512vbmi = ecx & bit_AVX512VBMI;
has_pku = ecx & bit_OSPKE;
has_avx512vbmi2 = ecx & bit_AVX512VBMI2;
+ has_avx512vnni = ecx & bit_AVX512VNNI;
has_rdpid = ecx & bit_RDPID;
has_gfni = ecx & bit_GFNI;
@@ -1064,6 +1066,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
const char *avx512vbmi = has_avx512vbmi ? " -mavx512vbmi" : " -mno-avx512vbmi";
const char *avx5124vnniw = has_avx5124vnniw ? " -mavx5124vnniw" : " -mno-avx5124vnniw";
const char *avx512vbmi2 = has_avx512vbmi2 ? " -mavx512vbmi2" : " -mno-avx512vbmi2";
+ const char *avx512vnni = has_avx512vnni ? " -mavx512vnni" : " -mno-avx512vnni";
const char *avx5124fmaps = has_avx5124fmaps ? " -mavx5124fmaps" : " -mno-avx5124fmaps";
const char *clwb = has_clwb ? " -mclwb" : " -mno-clwb";
const char *mwaitx = has_mwaitx ? " -mmwaitx" : " -mno-mwaitx";
@@ -1083,7 +1086,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
xsavec, xsaves, avx512dq, avx512bw, avx512vl,
avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw,
clwb, mwaitx, clzero, pku, rdpid, gfni, ibt, shstk,
- avx512vbmi2, NULL);
+ avx512vbmi2, avx512vnni, NULL);
}
done:
diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
index d1d522a..fc667a7 100644
--- a/gcc/config/i386/i386-c.c
+++ b/gcc/config/i386/i386-c.c
@@ -394,6 +394,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__AVX5124VNNIW__");
if (isa_flag2 & OPTION_MASK_ISA_AVX512VBMI2)
def_or_undef (parse_in, "__AVX512VBMI2__");
+ if (isa_flag2 & OPTION_MASK_ISA_AVX512VNNI)
+ def_or_undef (parse_in, "__AVX512VNNI__");
if (isa_flag2 & OPTION_MASK_ISA_SGX)
def_or_undef (parse_in, "__SGX__");
if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index fcf7db1..850ad40 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2747,6 +2747,7 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
{
{ "-mmpx", OPTION_MASK_ISA_MPX },
{ "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
+ { "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
{ "-mrdpid", OPTION_MASK_ISA_RDPID },
{ "-msgx", OPTION_MASK_ISA_SGX },
{ "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW },
@@ -5256,6 +5257,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
+ IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 638f1f15..3477aa9 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -89,6 +89,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define TARGET_AVX512VBMI2_P(x) TARGET_ISA_AVX512VBMI2_P(x)
#define TARGET_AVX512VPOPCNTDQ TARGET_ISA_AVX512VPOPCNTDQ
#define TARGET_AVX512VPOPCNTDQ_P(x) TARGET_ISA_AVX512VPOPCNTDQ_P(x)
+#define TARGET_AVX512VNNI TARGET_ISA_AVX512VNNI
+#define TARGET_AVX512VNNI_P(x) TARGET_ISA_AVX512VNNI_P(x)
#define TARGET_FMA TARGET_ISA_FMA
#define TARGET_FMA_P(x) TARGET_ISA_FMA_P(x)
#define TARGET_SSE4A TARGET_ISA_SSE4A
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index ce4ec7e..6632ba8 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -741,6 +741,10 @@ mavx512vbmi2
Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags2) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation.
+mavx512vnni
+Target Report Mask(ISA_AVX512VNNI) Var(ix86_isa_flags2) Save
+Support AVX512VNNI built-in functions and code generation.
+
mfma
Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation.