Fix PR87374: ICE with -mslow-flash-data and -mword-relocations

GCC ICEs under -mslow-flash-data and -mword-relocations because there
is no way to load an address, both literal pools and MOVW/MOVT being
forbidden. This patch gives an error message when both options are
specified by the user and adds the according dg-skip-if directives for
tests that use either of these options. It also explicitely set the
option when in PIC mode as per documentation rather than always check
for target_word_relocation together with flag_pic.

2018-10-31  Thomas Preud'homme  <thomas.preudhomme@linaro.org>

    gcc/
    PR target/87374
    * config/arm/arm.c (arm_option_check_internal): Disable the combined
    use of -mslow-flash-data and -mword-relocations.
    (arm_option_override): Enable -mword-relocations if -fpic or -fPIC.
    * config/arm/arm.md (SYMBOL_REF MOVT splitter): Stop checking for
    flag_pic.
    * doc/invoke.texi (-mword-relocations): Mention conflict with
    -mslow-flash-data.
    (-mslow-flash-data): Reciprocally.

    gcc/testsuite/
    PR target/87374
    * gcc.target/arm/movdi_movt.c: Skip if both -mslow-flash-data and
    -mword-relocations would be passed when compiling the test.
    * gcc.target/arm/movsi_movt.c: Likewise.
    * gcc.target/arm/pr81863.c: Likewise.
    * gcc.target/arm/thumb2-slow-flash-data-1.c: Likewise.
    * gcc.target/arm/thumb2-slow-flash-data-2.c: Likewise.
    * gcc.target/arm/thumb2-slow-flash-data-3.c: Likewise.
    * gcc.target/arm/thumb2-slow-flash-data-4.c: Likewise.
    * gcc.target/arm/thumb2-slow-flash-data-5.c: Likewise.
    * gcc.target/arm/tls-disable-literal-pool.c: Likewise.

From-SVN: r265662

2 files changed, 16 insertions, 8 deletions

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8810df5..8393f0b 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2893,17 +2893,22 @@ arm_option_check_internal (struct gcc_options *opts)
       flag_pic = 0;
     }
 
-  /* We only support -mpure-code and -mslow-flash-data on M-profile targets
-     with MOVT.  */
-  if ((target_pure_code || target_slow_flash_data)
-      && (!TARGET_HAVE_MOVT || arm_arch_notm || flag_pic || TARGET_NEON))
+  if (target_pure_code || target_slow_flash_data)
     {
       const char *flag = (target_pure_code ? "-mpure-code" :
 					     "-mslow-flash-data");
-      error ("%s only supports non-pic code on M-profile targets with the "
-	     "MOVT instruction", flag);
-    }
 
+      /* We only support -mpure-code and -mslow-flash-data on M-profile targets
+	 with MOVT.  */
+      if (!TARGET_HAVE_MOVT || arm_arch_notm || flag_pic || TARGET_NEON)
+	error ("%s only supports non-pic code on M-profile targets with the "
+	       "MOVT instruction", flag);
+
+      /* Cannot load addresses: -mslow-flash-data forbids literal pool and
+	 -mword-relocations forbids relocation of MOVT/MOVW.  */
+      if (target_word_relocations)
+	error ("%s incompatible with -mword-relocations", flag);
+    }
 }
 
 /* Recompute the global settings depending on target attribute options.  */
@@ -3489,6 +3494,9 @@ arm_option_override (void)
 	arm_pic_register = pic_register;
     }
 
+  if (flag_pic)
+    target_word_relocations = 1;
+
   /* Enable -mfix-cortex-m3-ldrd by default for Cortex-M3 cores.  */
   if (fix_cm3_ldrd == 2)
     {
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 270b8e4..a773518 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -6128,7 +6128,7 @@
   [(set (match_operand:SI 0 "arm_general_register_operand" "")
        (match_operand:SI 1 "general_operand" ""))]
   "TARGET_USE_MOVT && GET_CODE (operands[1]) == SYMBOL_REF
-   && !flag_pic && !target_word_relocations
+   && !target_word_relocations
    && !arm_tls_referenced_p (operands[1])"
   [(clobber (const_int 0))]
 {