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| author | Richard Earnshaw <rearnsha@arm.com> | 2005-04-04 10:51:38 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2005-04-04 10:51:38 +0000 |
| commit | 04d8b8197cec9d5beade42759cef94900aa82a26 (patch) | |
| tree | 4a63f1f992b104439f99ab9e439eb7c0ec36588c /gcc/config | |
| parent | 58dc8547f2b7c92a91925db69faa21ce856e6ab0 (diff) | |
| download | gcc-04d8b8197cec9d5beade42759cef94900aa82a26.zip gcc-04d8b8197cec9d5beade42759cef94900aa82a26.tar.gz gcc-04d8b8197cec9d5beade42759cef94900aa82a26.tar.bz2 | |
re PR target/14812 (ARM optimizer changes rsb/cmp to cmn, but condition codes different)
PR target/14812
* arm.c (arm_select_cc_mode): Return CC_Zmode when comparing against
a negated value.
From-SVN: r97533
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/arm/arm.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 83c5b85..bcf1904 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -6100,6 +6100,13 @@ arm_select_cc_mode (enum rtx_code op, rtx x, rtx y) || GET_CODE (x) == ROTATERT)) return CC_SWPmode; + /* This operation is performed swapped, but since we only rely on the Z + flag we don't need an additional mode. */ + if (GET_MODE (y) == SImode && REG_P (y) + && GET_CODE (x) == NEG + && (op == EQ || op == NE)) + return CC_Zmode; + /* This is a special case that is used by combine to allow a comparison of a shifted byte load to be split into a zero-extend followed by a comparison of the shifted integer (only valid for |