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authorNaveen.H.S <naveen.hs@kpitcummins.com>2008-03-25 13:44:00 +0000
committerKaz Kojima <kkojima@gcc.gnu.org>2008-03-25 13:44:00 +0000
commitde6adfa2f4dfd7afd05eecab3b6cb6b2321d6ef2 (patch)
treee7d1092da69cec2fe7ccfc962bbdc1439a0678b8 /gcc/config
parentf326a6cbc00ba13125882eb13d257660f2618d56 (diff)
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constraints.md (Pso, Psz): New constraints.
* config/sh/constraints.md (Pso, Psz): New constraints. * config/sh/sh.c (print_operand): Add %V and %W operand codes. * config/sh/sh.md (*andsi3_bclr, *iorsi3_bset): New insns. * gcc.target/sh/sh2a-bclr.c: New test. * gcc.target/sh/sh2a-bset.c: New test. From-SVN: r133518
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/sh/constraints.md26
-rw-r--r--gcc/config/sh/sh.c18
-rw-r--r--gcc/config/sh/sh.md16
3 files changed, 60 insertions, 0 deletions
diff --git a/gcc/config/sh/constraints.md b/gcc/config/sh/constraints.md
index 7509fae..5844793 100644
--- a/gcc/config/sh/constraints.md
+++ b/gcc/config/sh/constraints.md
@@ -35,6 +35,8 @@
;; M: 1
;; N: 0
;; P27: 1 | 2 | 8 | 16
+;; Pso: 1 | 2 | 4 | 8 | 16 | 32 | 64 | 128
+;; Psz: ~1 | ~2 | ~4 | ~8 | ~16 | ~32 | ~64 | ~128
;; Q: pc relative load operand
;; Rxx: reserved for exotic register classes.
;; Sxx: extra memory (storage) constraints
@@ -204,6 +206,30 @@
PIC_DIRECT_ADDR_P."
(match_test "IS_NON_EXPLICIT_CONSTANT_P (op)"))
+(define_constraint "Pso"
+ "Integer constant with a single bit set in its lower 8-bit."
+ (and (match_code "const_int")
+ (ior (match_test "ival == 1")
+ (match_test "ival == 2")
+ (match_test "ival == 4")
+ (match_test "ival == 8")
+ (match_test "ival == 16")
+ (match_test "ival == 32")
+ (match_test "ival == 64")
+ (match_test "ival == 128"))))
+
+(define_constraint "Psz"
+ "Integer constant with a single zero bit in the lower 8-bit."
+ (and (match_code "const_int")
+ (ior (match_test "~ival == 1")
+ (match_test "~ival == 2")
+ (match_test "~ival == 4")
+ (match_test "~ival == 8")
+ (match_test "~ival == 16")
+ (match_test "~ival == 32")
+ (match_test "~ival == 64")
+ (match_test "~ival == 128"))))
+
(define_memory_constraint "Sr0"
"@internal"
(and (match_test "memory_operand (op, GET_MODE (op))")
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index 699ac89..8bba322 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -681,6 +681,8 @@ print_operand_address (FILE *stream, rtx x)
'd' print a V2SF reg as dN instead of fpN.
'm' print a pair `base,offset' or `base,index', for LD and ST.
'U' Likewise for {LD,ST}{HI,LO}.
+ 'V' print the position of a single bit set.
+ 'W' print the position of a single bit cleared.
'u' prints the lowest 16 bits of CONST_INT, as an unsigned value.
'o' output an operator. */
@@ -887,6 +889,22 @@ print_operand (FILE *stream, rtx x, int code)
}
break;
+ case 'V':
+ {
+ int num = exact_log2 (INTVAL (x));
+ gcc_assert (num >= 0);
+ fprintf (stream, "#%d", num);
+ }
+ break;
+
+ case 'W':
+ {
+ int num = exact_log2 (~INTVAL (x));
+ gcc_assert (num >= 0);
+ fprintf (stream, "#%d", num);
+ }
+ break;
+
case 'd':
gcc_assert (GET_CODE (x) == REG && GET_MODE (x) == V2SFmode);
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 61e9025..f62b3b9 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -3170,6 +3170,14 @@ label:
andi %1, %2, %0"
[(set_attr "type" "arith_media")])
+(define_insn "*andsi3_bclr"
+ [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+ (and:SI (match_operand:SI 1 "arith_reg_operand" "%0")
+ (match_operand:SI 2 "const_int_operand" "Psz")))]
+ "TARGET_SH2A && satisfies_constraint_Psz (operands[2])"
+ "bclr\\t%W2,%0"
+ [(set_attr "type" "arith")])
+
;; If the constant is 255, then emit an extu.b instruction instead of an
;; and, since that will give better code.
@@ -3252,6 +3260,14 @@ label:
ori %1, %2, %0"
[(set_attr "type" "arith_media")])
+(define_insn "*iorsi3_bset"
+ [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+ (ior:SI (match_operand:SI 1 "arith_reg_operand" "%0")
+ (match_operand:SI 2 "const_int_operand" "Pso")))]
+ "TARGET_SH2A && satisfies_constraint_Pso (operands[2])"
+ "bset\\t%V2,%0"
+ [(set_attr "type" "arith")])
+
(define_insn "iordi3"
[(set (match_operand:DI 0 "arith_reg_dest" "=r,r")
(ior:DI (match_operand:DI 1 "arith_reg_operand" "%r,r")