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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2020-04-15 12:53:46 +0100 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2020-04-15 12:53:46 +0100 |
| commit | 479ccabc33e25efefa9925320764c929b387a152 (patch) | |
| tree | 7517e88336817d2ad23e80fa26752e0ae36bda80 /gcc/config | |
| parent | d2f9e6ad0ce9e1e40821243fa9d01b7fdc42f32c (diff) | |
| download | gcc-479ccabc33e25efefa9925320764c929b387a152.zip gcc-479ccabc33e25efefa9925320764c929b387a152.tar.gz gcc-479ccabc33e25efefa9925320764c929b387a152.tar.bz2 | |
Arm: MVE: Add mve vec_duplicate pattern
This patch fixes an ICE we were seeing due to a missing vec_duplicate pattern.
gcc/ChangeLog:
2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
(V_sz_elem2): Remove unused mode attribute.
gcc/testsuite/ChangeLog:
2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gcc.target/arm/mve/intrinsics/mve_vec_duplicate.c: New test.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/arm/mve.md | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 7054f7b..9cb18ef 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -17,8 +17,6 @@ ;; along with GCC; see the file COPYING3. If not see ;; <http://www.gnu.org/licenses/>. -(define_mode_attr V_sz_elem2 [(V16QI "s8") (V8HI "u16") (V4SI "u32") - (V2DI "u64")]) (define_mode_iterator MVE_types [V16QI V8HI V4SI V2DI TI V8HF V4SF V2DF]) (define_mode_iterator MVE_VLD_ST [V16QI V8HI V4SI V8HF V4SF]) (define_mode_iterator MVE_0 [V8HF V4SF]) @@ -11302,6 +11300,13 @@ [(set_attr "type" "mve_move") (set_attr "length" "8")]) +(define_insn "*mve_vec_duplicate<mode>" + [(set (match_operand:MVE_VLD_ST 0 "s_register_operand" "=w") + (vec_duplicate:MVE_VLD_ST (match_operand:<V_elem> 1 "general_operand" "r")))] + "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT" + "vdup.<V_sz_elem>\t%q0, %1" + [(set_attr "type" "mve_move")]) + ;; CDE instructions on MVE registers. (define_insn "arm_vcx1qv16qi" |