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| author | James Greenhalgh <james.greenhalgh@arm.com> | 2015-11-17 10:41:17 +0000 |
|---|---|---|
| committer | James Greenhalgh <jgreenhalgh@gcc.gnu.org> | 2015-11-17 10:41:17 +0000 |
| commit | 1c72a3ca6c2a82462ace2afe844ff1160ffdea29 (patch) | |
| tree | ba4eee71030e75eb87b9e548eec6e07360ec8aa3 /gcc/config | |
| parent | 697676457cb055edfd2420328b70a43b8a4c4a1a (diff) | |
| download | gcc-1c72a3ca6c2a82462ace2afe844ff1160ffdea29.zip gcc-1c72a3ca6c2a82462ace2afe844ff1160ffdea29.tar.gz gcc-1c72a3ca6c2a82462ace2afe844ff1160ffdea29.tar.bz2 | |
[Patch AArch64] Add support for Cortex-A35
gcc/
* config/aarch64/aarch64-cores.def (cortex-a35): New.
* config/aarch64/aarch64.c (cortexa35_tunings): New.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (-mcpu): Add Cortex-A35
From-SVN: r230458
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/aarch64/aarch64-cores.def | 1 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-tune.md | 2 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 25 |
3 files changed, 27 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 4af70ca..f8fab28 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -40,6 +40,7 @@ /* V8 Architecture Processors. */ +AARCH64_CORE("cortex-a35", cortexa35, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa35, "0x41", "0xd04") AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53, "0x41", "0xd03") AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07") AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08") diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md index c65a124..cbc6f48 100644 --- a/gcc/config/aarch64/aarch64-tune.md +++ b/gcc/config/aarch64/aarch64-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from aarch64-cores.def (define_attr "tune" - "cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53" + "cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53" (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 96df9ed..54b9b42 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -369,6 +369,31 @@ static const struct tune_params generic_tunings = (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ }; +static const struct tune_params cortexa35_tunings = +{ + &cortexa53_extra_costs, + &generic_addrcost_table, + &cortexa53_regmove_cost, + &generic_vector_cost, + &generic_branch_cost, + 4, /* memmov_cost */ + 1, /* issue_rate */ + (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD + | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ + 8, /* function_align. */ + 8, /* jump_align. */ + 4, /* loop_align. */ + 2, /* int_reassoc_width. */ + 4, /* fp_reassoc_width. */ + 1, /* vec_reassoc_width. */ + 2, /* min_div_recip_mul_sf. */ + 2, /* min_div_recip_mul_df. */ + 0, /* max_case_values. */ + 0, /* cache_line_size. */ + tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ + (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ +}; + static const struct tune_params cortexa53_tunings = { &cortexa53_extra_costs, |