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author | Trevor Saunders <tsaunders@mozilla.com> | 2014-04-17 12:37:34 +0000 |
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committer | Trevor Saunders <tbsaunde@gcc.gnu.org> | 2014-04-17 12:37:34 +0000 |
commit | be55bfe6cf456943b12fe128f8a445b583ace36f (patch) | |
tree | 2c7de59d1f6572c580defbe0ccac2d0b83cd1eb3 /gcc/config | |
parent | 1a3d085cf2a0caa5daef7c0443b1d280bcef295e (diff) | |
download | gcc-be55bfe6cf456943b12fe128f8a445b583ace36f.zip gcc-be55bfe6cf456943b12fe128f8a445b583ace36f.tar.gz gcc-be55bfe6cf456943b12fe128f8a445b583ace36f.tar.bz2 |
pass cfun to pass::execute
gcc/
* passes.c (opt_pass::execute): Adjust.
(pass_manager::execute_pass_mode_switching): Likewise.
(early_local_passes::execute): Likewise.
(execute_one_pass): Pass cfun to the pass's execute method.
* tree-pass.h (opt_pass::execute): Add function * argument.
* asan.c, auto-inc-dec.c, bb-reorder.c, bt-load.c, cfgcleanup.c,
cfgexpand.c, cfgrtl.c, cgraphbuild.c, combine-stack-adj.c, combine.c,
compare-elim.c, config/arc/arc.c, config/epiphany/mode-switch-use.c,
config/epiphany/resolve-sw-modes.c, config/i386/i386.c,
config/mips/mips.c, config/rl78/rl78.c, config/s390/s390.c,
config/sparc/sparc.c, cprop.c, dce.c, df-core.c, dse.c, dwarf2cfi.c,
except.c, final.c, function.c, fwprop.c, gcse.c, gimple-low.c,
gimple-ssa-isolate-paths.c, gimple-ssa-strength-reduction.c,
graphite.c, ifcvt.c, init-regs.c, ipa-cp.c, ipa-devirt.c,
ipa-inline-analysis.c, ipa-inline.c, ipa-profile.c, ipa-pure-const.c,
ipa-reference.c, ipa-split.c, ipa.c, ira.c, jump.c, loop-init.c,
lower-subreg.c, mode-switching.c, omp-low.c, postreload-gcse.c,
postreload.c, predict.c, recog.c, ree.c, reg-stack.c, regcprop.c,
reginfo.c, regrename.c, reorg.c, sched-rgn.c, stack-ptr-mod.c,
store-motion.c, tracer.c, trans-mem.c, tree-call-cdce.c, tree-cfg.c,
tree-cfgcleanup.c, tree-complex.c, tree-eh.c, tree-emutls.c,
tree-if-conv.c, tree-into-ssa.c, tree-loop-distribution.c, tree-nrv.c,
tree-object-size.c, tree-parloops.c, tree-predcom.c, tree-ssa-ccp.c,
tree-ssa-copy.c, tree-ssa-copyrename.c, tree-ssa-dce.c,
tree-ssa-dom.c, tree-ssa-dse.c, tree-ssa-forwprop.c,
tree-ssa-ifcombine.c, tree-ssa-loop-ch.c, tree-ssa-loop-im.c,
tree-ssa-loop-ivcanon.c, tree-ssa-loop-prefetch.c,
tree-ssa-loop-unswitch.c, tree-ssa-loop.c, tree-ssa-math-opts.c,
tree-ssa-phiopt.c, tree-ssa-phiprop.c, tree-ssa-pre.c,
tree-ssa-reassoc.c, tree-ssa-sink.c, tree-ssa-strlen.c,
tree-ssa-structalias.c, tree-ssa-uncprop.c, tree-ssa-uninit.c,
tree-ssa.c, tree-ssanames.c, tree-stdarg.c, tree-switch-conversion.c,
tree-tailcall.c, tree-vect-generic.c, tree-vectorizer.c, tree-vrp.c,
tree.c, tsan.c, ubsan.c, var-tracking.c, vtable-verify.c, web.c:
Adjust.
From-SVN: r209482
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/arc/arc.c | 7 | ||||
-rw-r--r-- | gcc/config/epiphany/mode-switch-use.c | 2 | ||||
-rw-r--r-- | gcc/config/epiphany/resolve-sw-modes.c | 68 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 5 | ||||
-rw-r--r-- | gcc/config/mips/mips.c | 2 | ||||
-rw-r--r-- | gcc/config/rl78/rl78.c | 17 | ||||
-rw-r--r-- | gcc/config/s390/s390.c | 56 | ||||
-rw-r--r-- | gcc/config/sparc/sparc.c | 5 |
8 files changed, 84 insertions, 78 deletions
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index eddc55ed..64d1312 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -623,7 +623,7 @@ public: /* opt_pass methods: */ opt_pass * clone () { return new pass_arc_ifcvt (m_ctxt); } - unsigned int execute () { return arc_ifcvt (); } + virtual unsigned int execute (function *) { return arc_ifcvt (); } }; } // anon namespace @@ -660,7 +660,10 @@ public: {} /* opt_pass methods: */ - unsigned int execute () { return arc_predicate_delay_insns (); } + virtual unsigned int execute (function *) + { + return arc_predicate_delay_insns (); + } }; } // anon namespace diff --git a/gcc/config/epiphany/mode-switch-use.c b/gcc/config/epiphany/mode-switch-use.c index d893934..9617041 100644 --- a/gcc/config/epiphany/mode-switch-use.c +++ b/gcc/config/epiphany/mode-switch-use.c @@ -95,7 +95,7 @@ public: {} /* opt_pass methods: */ - unsigned int execute () { return insert_uses (); } + virtual unsigned int execute (function *) { return insert_uses (); } }; // class pass_mode_switch_use diff --git a/gcc/config/epiphany/resolve-sw-modes.c b/gcc/config/epiphany/resolve-sw-modes.c index 31928fd..fa8fea5 100644 --- a/gcc/config/epiphany/resolve-sw-modes.c +++ b/gcc/config/epiphany/resolve-sw-modes.c @@ -38,6 +38,35 @@ along with GCC; see the file COPYING3. If not see #include "insn-attr-common.h" #include "tree-pass.h" +namespace { + +const pass_data pass_data_resolve_sw_modes = +{ + RTL_PASS, /* type */ + "resolve_sw_modes", /* name */ + OPTGROUP_NONE, /* optinfo_flags */ + true, /* has_execute */ + TV_MODE_SWITCH, /* tv_id */ + 0, /* properties_required */ + 0, /* properties_provided */ + 0, /* properties_destroyed */ + 0, /* todo_flags_start */ + ( TODO_df_finish | TODO_verify_rtl_sharing | 0 ), /* todo_flags_finish */ +}; + +class pass_resolve_sw_modes : public rtl_opt_pass +{ +public: + pass_resolve_sw_modes(gcc::context *ctxt) + : rtl_opt_pass(pass_data_resolve_sw_modes, ctxt) + {} + + /* opt_pass methods: */ + virtual bool gate (function *) { return optimize; } + virtual unsigned int execute (function *); + +}; // class pass_resolve_sw_modes + /* Clean-up after mode switching: Check for mode setting insns that have FP_MODE_ROUND_UNKNOWN. If only one rounding mode is required, select that one. @@ -45,8 +74,8 @@ along with GCC; see the file COPYING3. If not see insert new mode setting insns on the edges where the other mode becomes unambigous. */ -static unsigned -resolve_sw_modes (void) +unsigned +pass_resolve_sw_modes::execute (function *fun) { basic_block bb; rtx insn, src; @@ -55,15 +84,15 @@ resolve_sw_modes (void) bool need_commit = false; bool finalize_fp_sets = (MACHINE_FUNCTION (cfun)->unknown_mode_sets == 0); - todo.create (last_basic_block_for_fn (cfun)); - pushed = sbitmap_alloc (last_basic_block_for_fn (cfun)); + todo.create (last_basic_block_for_fn (fun)); + pushed = sbitmap_alloc (last_basic_block_for_fn (fun)); bitmap_clear (pushed); if (!finalize_fp_sets) { df_note_add_problem (); df_analyze (); } - FOR_EACH_BB_FN (bb, cfun) + FOR_EACH_BB_FN (bb, fun) FOR_BB_INSNS (bb, insn) { enum attr_fp_mode selected_mode; @@ -155,35 +184,6 @@ resolve_sw_modes (void) return 0; } -namespace { - -const pass_data pass_data_resolve_sw_modes = -{ - RTL_PASS, /* type */ - "resolve_sw_modes", /* name */ - OPTGROUP_NONE, /* optinfo_flags */ - true, /* has_execute */ - TV_MODE_SWITCH, /* tv_id */ - 0, /* properties_required */ - 0, /* properties_provided */ - 0, /* properties_destroyed */ - 0, /* todo_flags_start */ - ( TODO_df_finish | TODO_verify_rtl_sharing | 0 ), /* todo_flags_finish */ -}; - -class pass_resolve_sw_modes : public rtl_opt_pass -{ -public: - pass_resolve_sw_modes(gcc::context *ctxt) - : rtl_opt_pass(pass_data_resolve_sw_modes, ctxt) - {} - - /* opt_pass methods: */ - virtual bool gate (function *) { return optimize; } - unsigned int execute () { return resolve_sw_modes (); } - -}; // class pass_resolve_sw_modes - } // anon namespace rtl_opt_pass * diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 10d2fcb..c2dcbce 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -2542,7 +2542,10 @@ public: return TARGET_AVX && !TARGET_AVX512F && TARGET_VZEROUPPER; } - unsigned int execute () { return rest_of_handle_insert_vzeroupper (); } + virtual unsigned int execute (function *) + { + return rest_of_handle_insert_vzeroupper (); + } }; // class pass_insert_vzeroupper diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 6c0b3c2..45256e9 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -16550,7 +16550,7 @@ public: {} /* opt_pass methods: */ - unsigned int execute () { return mips_machine_reorg2 (); } + virtual unsigned int execute (function *) { return mips_machine_reorg2 (); } }; // class pass_mips_machine_reorg2 diff --git a/gcc/config/rl78/rl78.c b/gcc/config/rl78/rl78.c index 988e1cd..0731491 100644 --- a/gcc/config/rl78/rl78.c +++ b/gcc/config/rl78/rl78.c @@ -117,14 +117,6 @@ rl78_init_machine_status (void) return m; } -/* Runs the devirtualization pass. */ -static unsigned int -devirt_pass (void) -{ - rl78_reorg (); - return 0; -} - /* This pass converts virtual instructions using virtual registers, to real instructions using real registers. Rather than run it as reorg, we reschedule it before vartrack to help with debugging. */ @@ -153,7 +145,12 @@ public: } /* opt_pass methods: */ - unsigned int execute () { return devirt_pass (); } + virtual unsigned int execute (function *) + { + rl78_reorg (); + return 0; + } + }; } // anon namespace @@ -235,7 +232,7 @@ public: } /* opt_pass methods: */ - unsigned int execute () { return move_elim_pass (); } + virtual unsigned int execute (function *) { return move_elim_pass (); } }; } // anon namespace diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 77e163f..cc8f32e 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -8631,33 +8631,6 @@ s390_restore_gprs_from_fprs (void) /* A pass run immediately before shrink-wrapping and prologue and epilogue generation. */ -static unsigned int -s390_early_mach (void) -{ - rtx insn; - - /* Try to get rid of the FPR clobbers. */ - s390_optimize_nonescaping_tx (); - - /* Re-compute register info. */ - s390_register_info (); - - /* If we're using a base register, ensure that it is always valid for - the first non-prologue instruction. */ - if (cfun->machine->base_reg) - emit_insn_at_entry (gen_main_pool (cfun->machine->base_reg)); - - /* Annotate all constant pool references to let the scheduler know - they implicitly use the base register. */ - for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) - if (INSN_P (insn)) - { - annotate_constant_pool_refs (&PATTERN (insn)); - df_insn_rescan (insn); - } - return 0; -} - namespace { const pass_data pass_data_s390_early_mach = @@ -8683,10 +8656,37 @@ public: {} /* opt_pass methods: */ - unsigned int execute () { return s390_early_mach (); } + virtual unsigned int execute (function *); }; // class pass_s390_early_mach +unsigned int +pass_s390_early_mach::execute (function *fun) +{ + rtx insn; + + /* Try to get rid of the FPR clobbers. */ + s390_optimize_nonescaping_tx (); + + /* Re-compute register info. */ + s390_register_info (); + + /* If we're using a base register, ensure that it is always valid for + the first non-prologue instruction. */ + if (fun->machine->base_reg) + emit_insn_at_entry (gen_main_pool (fun->machine->base_reg)); + + /* Annotate all constant pool references to let the scheduler know + they implicitly use the base register. */ + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + if (INSN_P (insn)) + { + annotate_constant_pool_refs (&PATTERN (insn)); + df_insn_rescan (insn); + } + return 0; +} + } // anon namespace /* Expand the prologue into a bunch of separate insns. */ diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 5578cb8..62354ee 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1145,7 +1145,10 @@ public: return sparc_fix_at697f != 0 || sparc_fix_ut699 != 0; } - unsigned int execute () { return sparc_do_work_around_errata (); } + virtual unsigned int execute (function *) + { + return sparc_do_work_around_errata (); + } }; // class pass_work_around_errata |