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| author | Alexander Ivchenko <alexander.ivchenko@intel.com> | 2013-10-28 14:40:08 +0000 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2013-10-28 14:40:08 +0000 |
| commit | b868b7cae49515ed5311910be0bc91bce44e47f1 (patch) | |
| tree | 4b5b7439ec69c9d1bee286053d86438a406fdcd4 /gcc/config | |
| parent | c003c6d6c3398cd119bbbaf2a2bb8a6134022ff8 (diff) | |
| download | gcc-b868b7cae49515ed5311910be0bc91bce44e47f1.zip gcc-b868b7cae49515ed5311910be0bc91bce44e47f1.tar.gz gcc-b868b7cae49515ed5311910be0bc91bce44e47f1.tar.bz2 | |
i386.md (prefetch): Allow TARGET_AVX512PF.
* config/i386/i386.md (prefetch): Allow TARGET_AVX512PF.
(*prefetch_avx512pf_<mode>): New.
* config/i386/sse.md (avx512f_vmcmp<mode>3): Ditto.
(avx512f_maskcmp<mode>3): Ditto.
(vashrv16si3): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>
From-SVN: r204130
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/i386.md | 18 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 34 |
2 files changed, 50 insertions, 2 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 81f565c..79db5f8 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -17627,7 +17627,7 @@ [(prefetch (match_operand 0 "address_operand") (match_operand:SI 1 "const_int_operand") (match_operand:SI 2 "const_int_operand"))] - "TARGET_PREFETCH_SSE || TARGET_PRFCHW" + "TARGET_PREFETCH_SSE || TARGET_PRFCHW || TARGET_AVX512PF" { bool write = INTVAL (operands[1]) != 0; int locality = INTVAL (operands[2]); @@ -17638,7 +17638,9 @@ supported by SSE counterpart or the SSE prefetch is not available (K6 machines). Otherwise use SSE prefetch as it allows specifying of locality. */ - if (TARGET_PRFCHW && (write || !TARGET_PREFETCH_SSE)) + if (TARGET_AVX512PF && write) + operands[2] = const1_rtx; + else if (TARGET_PRFCHW && (write || !TARGET_PREFETCH_SSE)) operands[2] = GEN_INT (3); else operands[1] = const0_rtx; @@ -17681,6 +17683,18 @@ (symbol_ref "memory_address_length (operands[0], false)")) (set_attr "memory" "none")]) +(define_insn "*prefetch_avx512pf_<mode>" + [(prefetch (match_operand:P 0 "address_operand" "p") + (const_int 1) + (const_int 1))] + "TARGET_AVX512PF" + "prefetchwt1\t%a0"; + [(set_attr "type" "sse") + (set_attr "prefix" "evex") + (set (attr "length_address") + (symbol_ref "memory_address_length (operands[0], false)")) + (set_attr "memory" "none")]) + (define_expand "stack_protect_set" [(match_operand 0 "memory_operand") (match_operand 1 "memory_operand")] diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 09f194c..041ca64 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2010,6 +2010,34 @@ (set_attr "prefix" "evex") (set_attr "mode" "<sseinsnmode>")]) +(define_insn "avx512f_vmcmp<mode>3" + [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k") + (and:<avx512fmaskmode> + (unspec:<avx512fmaskmode> + [(match_operand:VF_128 1 "register_operand" "v") + (match_operand:VF_128 2 "nonimmediate_operand" "vm") + (match_operand:SI 3 "const_0_to_31_operand" "n")] + UNSPEC_PCMP) + (const_int 1)))] + "TARGET_AVX512F" + "vcmp<ssescalarmodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "type" "ssecmp") + (set_attr "length_immediate" "1") + (set_attr "prefix" "evex") + (set_attr "mode" "<ssescalarmode>")]) + +(define_insn "avx512f_maskcmp<mode>3" + [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k") + (match_operator:<avx512fmaskmode> 3 "sse_comparison_operator" + [(match_operand:VF 1 "register_operand" "v") + (match_operand:VF 2 "nonimmediate_operand" "vm")]))] + "TARGET_SSE" + "vcmp%D3<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "type" "ssecmp") + (set_attr "length_immediate" "1") + (set_attr "prefix" "evex") + (set_attr "mode" "<sseinsnmode>")]) + (define_insn "<sse>_comi" [(set (reg:CCFP FLAGS_REG) (compare:CCFP @@ -12148,6 +12176,12 @@ } }) +(define_expand "vashrv16si3" + [(set (match_operand:V16SI 0 "register_operand") + (ashiftrt:V16SI (match_operand:V16SI 1 "register_operand") + (match_operand:V16SI 2 "nonimmediate_operand")))] + "TARGET_AVX512F") + (define_expand "vashrv8si3" [(set (match_operand:V8SI 0 "register_operand") (ashiftrt:V8SI (match_operand:V8SI 1 "register_operand") |