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| author | Nathan Froyd <froydnj@codesourcery.com> | 2007-08-21 17:22:46 +0000 |
|---|---|---|
| committer | Nathan Froyd <froydnj@gcc.gnu.org> | 2007-08-21 17:22:46 +0000 |
| commit | 21d818ff361c99286d2749a10392a32c1dd77187 (patch) | |
| tree | d531bf25a112d1b71ba7a4f06b5da98307951c73 /gcc/config | |
| parent | d6b3c79757281c980f71f24d62d5b68a0b933d09 (diff) | |
| download | gcc-21d818ff361c99286d2749a10392a32c1dd77187.zip gcc-21d818ff361c99286d2749a10392a32c1dd77187.tar.gz gcc-21d818ff361c99286d2749a10392a32c1dd77187.tar.bz2 | |
rs6000.c (expand_block_clear): Add TARGET_SPE cases to set eight bytes at a time.
gcc/
* config/rs6000/rs6000.c (expand_block_clear): Add TARGET_SPE
cases to set eight bytes at a time.
(expand_block_move): Likewise.
gcc/testsuite/
* gcc.target/powerpc/spe-vector-memset.c: New testcase.
* gcc.target/powerpc/spe-vector-memcpy.c: New testcase.
From-SVN: r127670
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 5354e52..44e4928 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -9852,6 +9852,8 @@ expand_block_clear (rtx operands[]) clear_step = 16; else if (TARGET_POWERPC64 && align >= 32) clear_step = 8; + else if (TARGET_SPE && align >= 64) + clear_step = 8; else clear_step = 4; @@ -9870,10 +9872,15 @@ expand_block_clear (rtx operands[]) clear_bytes = 16; mode = V4SImode; } + else if (bytes >= 8 && TARGET_SPE && align >= 64) + { + clear_bytes = 8; + mode = V2SImode; + } else if (bytes >= 8 && TARGET_POWERPC64 - /* 64-bit loads and stores require word-aligned - displacements. */ - && (align >= 64 || (!STRICT_ALIGNMENT && align >= 32))) + /* 64-bit loads and stores require word-aligned + displacements. */ + && (align >= 64 || (!STRICT_ALIGNMENT && align >= 32))) { clear_bytes = 8; mode = DImode; @@ -9963,6 +9970,12 @@ expand_block_move (rtx operands[]) mode = V4SImode; gen_func.mov = gen_movv4si; } + else if (TARGET_SPE && bytes >= 8 && align >= 64) + { + move_bytes = 8; + mode = V2SImode; + gen_func.mov = gen_movv2si; + } else if (TARGET_STRING && bytes > 24 /* move up to 32 bytes at a time */ && ! fixed_regs[5] |