read-rtl.c (parse_reg_note_name): Replace Yoda conditions with typical order conditions.

	* read-rtl.c (parse_reg_note_name): Replace Yoda conditions with
	typical order conditions.
	* sel-sched.c (extract_new_fences_from): Likewise.
	* config/visium/constraints.md (J, K, L): Likewise.
	* config/visium/predicates.md (const_shift_operand): Likewise.
	* config/visium/visium.c (visium_legitimize_address,
	visium_legitimize_reload_address): Likewise.
	* config/m68k/m68k.c (output_reg_adjust, emit_reg_adjust): Likewise.
	* config/arm/arm.c (arm_block_move_unaligned_straight): Likewise.
	* config/avr/constraints.md (Y01, Ym1, Y02, Ym2): Likewise.
	* config/avr/avr-log.c (avr_vdump, avr_log_set_avr_log,
	SET_DUMP_DETAIL): Likewise.
	* config/avr/predicates.md (const_8_16_24_operand): Likewise.
	* config/avr/avr.c (STR_PREFIX_P, avr_popcount_each_byte,
	avr_is_casesi_sequence, avr_casei_sequence_check_operands,
	avr_set_core_architecture, avr_set_current_function,
	avr_legitimize_reload_address, avr_asm_len, avr_print_operand,
	output_movqi, output_movsisf, avr_out_plus, avr_out_bitop,
	avr_out_fract, avr_adjust_insn_length, avr_encode_section_info,
	avr_2word_insn_p, output_reload_in_const, avr_has_nibble_0xf,
	avr_map_decompose, avr_fold_builtin): Likewise.
	* config/avr/driver-avr.c (avr_devicespecs_file): Likewise.
	* config/avr/gen-avr-mmcu-specs.c (str_prefix_p, print_mcu): Likewise.
	* config/i386/i386.c (ix86_parse_stringop_strategy_string): Likewise.
	* config/m32c/m32c-pragma.c (m32c_pragma_memregs): Likewise.
	* config/m32c/m32c.c (m32c_conditional_register_usage,
	m32c_address_cost): Likewise.
	* config/m32c/predicates.md (shiftcount_operand,
	longshiftcount_operand): Likewise.
	* config/iq2000/iq2000.c (iq2000_expand_prologue): Likewise.
	* config/nios2/nios2.c (nios2_handle_custom_fpu_insn_option,
	can_use_cdx_ldstw): Likewise.
	* config/nios2/nios2.h (CDX_REG_P): Likewise.
	* config/cr16/cr16.h (RETURN_ADDR_RTX, REGNO_MODE_OK_FOR_BASE_P):
	Likewise.
	* config/cr16/cr16.md (*mov<mode>_double): Likewise.
	* config/cr16/cr16.c (cr16_create_dwarf_for_multi_push): Likewise.
	* config/h8300/h8300.c (h8300_rtx_costs, get_shift_alg): Likewise.
	* config/vax/constraints.md (U06, U08, U16, CN6, S08, S16): Likewise.
	* config/vax/vax.c (adjacent_operands_p): Likewise.
	* config/ft32/constraints.md (L, b, KA): Likewise.
	* config/ft32/ft32.c (ft32_load_immediate, ft32_expand_prologue):
	Likewise.
	* cfgexpand.c (expand_stack_alignment): Likewise.
	* gcse.c (insert_expr_in_table): Likewise.
	* print-rtl.c (rtx_writer::print_rtx_operand_codes_E_and_V): Likewise.
	* cgraphunit.c (cgraph_node::expand): Likewise.
	* ira-build.c (setup_min_max_allocno_live_range_point): Likewise.
	* emit-rtl.c (add_insn): Likewise.
	* input.c (dump_location_info): Likewise.
	* passes.c (NEXT_PASS): Likewise.
	* read-rtl-function.c (parse_note_insn_name,
	function_reader::read_rtx_operand_r, function_reader::parse_mem_expr):
	Likewise.
	* sched-rgn.c (sched_rgn_init): Likewise.
	* diagnostic-show-locus.c (layout::show_ruler): Likewise.
	* combine.c (find_split_point, simplify_if_then_else, force_to_mode,
	if_then_else_cond, simplify_shift_const_1, simplify_comparison): Likewise.
	* explow.c (eliminate_constant_term): Likewise.
	* final.c (leaf_renumber_regs_insn): Likewise.
	* cfgrtl.c (print_rtl_with_bb): Likewise.
	* genhooks.c (emit_init_macros): Likewise.
	* poly-int.h (maybe_ne, maybe_le, maybe_lt): Likewise.
	* tree-data-ref.c (conflict_fn): Likewise.
	* selftest.c (assert_streq): Likewise.
	* expr.c (store_constructor_field, expand_expr_real_1): Likewise.
	* fold-const.c (fold_range_test, extract_muldiv_1, fold_truth_andor,
	fold_binary_loc, multiple_of_p): Likewise.
	* reload.c (push_reload, find_equiv_reg): Likewise.
	* et-forest.c (et_nca, et_below): Likewise.
	* dbxout.c (dbxout_symbol_location): Likewise.
	* reorg.c (relax_delay_slots): Likewise.
	* dojump.c (do_compare_rtx_and_jump): Likewise.
	* gengtype-parse.c (type): Likewise.
	* simplify-rtx.c (simplify_gen_ternary, simplify_gen_relational,
	simplify_const_relational_operation): Likewise.
	* reload1.c (do_output_reload): Likewise.
	* dumpfile.c (get_dump_file_info_by_switch): Likewise.
	* gengtype.c (type_for_name): Likewise.
	* gimple-ssa-sprintf.c (format_directive): Likewise.
ada/
	* gcc-interface/trans.c (Loop_Statement_to_gnu): Replace Yoda
	conditions with typical order conditions.
	* gcc-interface/misc.c (gnat_get_array_descr_info,
	default_pass_by_ref): Likewise.
	* gcc-interface/decl.c (gnat_to_gnu_entity): Likewise.
	* adaint.c (__gnat_tmp_name): Likewise.
c-family/
	* known-headers.cc (get_stdlib_header_for_name): Replace Yoda
	conditions with typical order conditions.
c/
	* c-typeck.c (comptypes_internal, function_types_compatible_p,
	perform_integral_promotions, digest_init): Replace Yoda conditions
	with typical order conditions.
	* c-decl.c (check_bitfield_type_and_width): Likewise.
cp/
	* name-lookup.c (get_std_name_hint): Replace Yoda conditions with
	typical order conditions.
	* class.c (check_bitfield_decl): Likewise.
	* pt.c (convert_template_argument): Likewise.
	* decl.c (duplicate_decls): Likewise.
	* typeck.c (commonparms): Likewise.
fortran/
	* scanner.c (preprocessor_line): Replace Yoda conditions with typical
	order conditions.
	* dependency.c (check_section_vs_section): Likewise.
	* trans-array.c (gfc_conv_expr_descriptor): Likewise.
jit/
	* jit-playback.c (get_type, playback::compile_to_file::copy_file,
	playback::context::acquire_mutex): Replace Yoda conditions with
	typical order conditions.
	* libgccjit.c (gcc_jit_context_new_struct_type,
	gcc_jit_struct_set_fields, gcc_jit_context_new_union_type,
	gcc_jit_context_new_function, gcc_jit_timer_pop): Likewise.
	* jit-builtins.c (matches_builtin): Likewise.
	* jit-recording.c (recording::compound_type::set_fields,
	recording::fields::write_reproducer, recording::rvalue::set_scope,
	recording::function::validate): Likewise.
	* jit-logging.c (logger::decref): Likewise.

From-SVN: r255831

26 files changed, 134 insertions, 148 deletions

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 3252f84..f914285 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -13987,7 +13987,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
   HOST_WIDE_INT src_autoinc, dst_autoinc;
   rtx mem, addr;
   
-  gcc_assert (1 <= interleave_factor && interleave_factor <= 4);
+  gcc_assert (interleave_factor >= 1 && interleave_factor <= 4);
   
   /* Use hard registers if we have aligned source or destination so we can use
      load/store multiple with contiguous registers.  */
diff --git a/gcc/config/avr/avr-log.c b/gcc/config/avr/avr-log.c
index e3a821a..d1cf3dd 100644
--- a/gcc/config/avr/avr-log.c
+++ b/gcc/config/avr/avr-log.c
@@ -86,7 +86,7 @@ avr_vdump (FILE *stream, const char *caller, ...)
 {
   va_list ap;
         
-  if (NULL == stream && dump_file)
+  if (stream == NULL && dump_file)
     stream = dump_file;
 
   va_start (ap, caller);
@@ -294,15 +294,15 @@ avr_log_set_avr_log (void)
       str[0] = ',';
       strcat (stpcpy (str+1, avr_log_details), ",");
 
-      all |= NULL != strstr (str, ",all,");
-      info = NULL != strstr (str, ",?,");
+      all |= strstr (str, ",all,") != NULL;
+      info = strstr (str, ",?,") != NULL;
 
       if (info)
         fprintf (stderr, "\n-mlog=");
 
 #define SET_DUMP_DETAIL(S)                                       \
       do {                                                       \
-        avr_log.S = (all || NULL != strstr (str, "," #S ","));   \
+	avr_log.S = (all || strstr (str, "," #S ",") != NULL);   \
         if (info)                                                \
           fprintf (stderr, #S ",");                              \
       } while (0)
diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index 8a28950..ff6672f 100644
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -65,7 +65,7 @@
 #define MAX_LD_OFFSET(MODE) (64 - (signed)GET_MODE_SIZE (MODE))
 
 /* Return true if STR starts with PREFIX and false, otherwise.  */
-#define STR_PREFIX_P(STR,PREFIX) (0 == strncmp (STR, PREFIX, strlen (PREFIX)))
+#define STR_PREFIX_P(STR,PREFIX) (strncmp (STR, PREFIX, strlen (PREFIX)) == 0)
 
 /* The 4 bits starting at SECTION_MACH_DEP are reserved to store the
    address space where data is to be located.
@@ -269,7 +269,7 @@ avr_popcount_each_byte (rtx xval, int n_bytes, int pop_mask)
       rtx xval8 = simplify_gen_subreg (QImode, xval, mode, i);
       unsigned int val8 = UINTVAL (xval8) & GET_MODE_MASK (QImode);
 
-      if (0 == (pop_mask & (1 << popcount_hwi (val8))))
+      if ((pop_mask & (1 << popcount_hwi (val8))) == 0)
         return false;
     }
 
@@ -461,8 +461,8 @@ avr_is_casesi_sequence (basic_block bb, rtx_insn *insn, rtx_insn *insns[6])
 
   // Assert on the anatomy of xinsn's operands we are going to work with.
 
-  gcc_assert (11 == recog_data.n_operands);
-  gcc_assert (4 == recog_data.n_dups);
+  gcc_assert (recog_data.n_operands == 11);
+  gcc_assert (recog_data.n_dups == 4);
 
   if (dump_file)
     {
@@ -509,7 +509,7 @@ avr_casei_sequence_check_operands (rtx *xop)
 
   if (sub_5
       && SUBREG_P (sub_5)
-      && 0 == SUBREG_BYTE (sub_5)
+      && SUBREG_BYTE (sub_5) == 0
       && rtx_equal_p (xop[5], SUBREG_REG (sub_5)))
     return true;
 
@@ -697,7 +697,7 @@ avr_set_core_architecture (void)
 
   for (const avr_mcu_t *mcu = avr_mcu_types; ; mcu++)
     {
-      if (NULL == mcu->name)
+      if (mcu->name == NULL)
         {
           /* Reached the end of `avr_mcu_types'.  This should actually never
              happen as options are provided by device-specs.  It could be a
@@ -709,9 +709,9 @@ avr_set_core_architecture (void)
           avr_inform_core_architectures ();
           break;
         }
-      else if (0 == strcmp (mcu->name, avr_mmcu)
+      else if (strcmp (mcu->name, avr_mmcu) == 0
                // Is this a proper architecture ?
-               && NULL == mcu->macro)
+	       && mcu->macro == NULL)
         {
           avr_arch = &avr_arch_types[mcu->arch_id];
           if (avr_n_flash < 0)
@@ -1109,9 +1109,9 @@ avr_set_current_function (tree decl)
   // Common problem is using "ISR" without first including avr/interrupt.h.
   const char *name = IDENTIFIER_POINTER (DECL_NAME (decl));
   name = default_strip_name_encoding (name);
-  if (0 == strcmp ("ISR", name)
-      || 0 == strcmp ("INTERRUPT", name)
-      || 0 == strcmp ("SIGNAL", name))
+  if (strcmp ("ISR", name) == 0
+      || strcmp ("INTERRUPT", name) == 0
+      || strcmp ("SIGNAL", name) == 0)
     {
       warning_at (loc, OPT_Wmisspelled_isr, "%qs is a reserved identifier"
                   " in AVR-LibC.  Consider %<#include <avr/interrupt.h>%>"
@@ -2572,7 +2572,7 @@ avr_legitimize_reload_address (rtx *px, machine_mode mode,
 
   if (GET_CODE (x) == PLUS
       && REG_P (XEXP (x, 0))
-      && 0 == reg_equiv_constant (REGNO (XEXP (x, 0)))
+      && reg_equiv_constant (REGNO (XEXP (x, 0))) == 0
       && CONST_INT_P (XEXP (x, 1))
       && INTVAL (XEXP (x, 1)) >= 1)
     {
@@ -2639,10 +2639,8 @@ avr_legitimize_reload_address (rtx *px, machine_mode mode,
 static const char*
 avr_asm_len (const char* tpl, rtx* operands, int* plen, int n_words)
 {
-  if (NULL == plen)
-    {
-      output_asm_insn (tpl, operands);
-    }
+  if (plen == NULL)
+    output_asm_insn (tpl, operands);
   else
     {
       if (n_words < 0)
@@ -2969,7 +2967,7 @@ avr_print_operand (FILE *file, rtx x, int code)
   else if (code == 'x')
     {
       /* Constant progmem address - like used in jmp or call */
-      if (0 == text_segment_operand (x, VOIDmode))
+      if (text_segment_operand (x, VOIDmode) == 0)
         if (warning (0, "accessing program memory"
                      " with data memory address"))
           {
@@ -3930,7 +3928,7 @@ output_movqi (rtx_insn *insn, rtx operands[], int *plen)
       return avr_out_lpm (insn, operands, plen);
     }
 
-  gcc_assert (1 == GET_MODE_SIZE (GET_MODE (dest)));
+  gcc_assert (GET_MODE_SIZE (GET_MODE (dest)) == 1);
 
   if (REG_P (dest))
     {
@@ -4925,7 +4923,7 @@ output_movsisf (rtx_insn *insn, rtx operands[], int *l)
   if (!l)
     l = &dummy;
 
-  gcc_assert (4 == GET_MODE_SIZE (GET_MODE (dest)));
+  gcc_assert (GET_MODE_SIZE (GET_MODE (dest)) == 4);
 
   if (REG_P (dest))
     {
@@ -8265,7 +8263,7 @@ avr_out_plus (rtx insn, rtx *xop, int *plen, int *pcc, bool out_label)
       return "";
     }
 
-  if (8 == n_bytes)
+  if (n_bytes == 8)
     {
       op[0] = gen_rtx_REG (DImode, ACC_A);
       op[1] = gen_rtx_REG (DImode, ACC_A);
@@ -8383,11 +8381,11 @@ avr_out_bitop (rtx insn, rtx *xop, int *plen)
         {
         case IOR:
 
-          if (0 == pop8)
+	  if (pop8 == 0)
             continue;
           else if (ld_reg_p)
             avr_asm_len ("ori %0,%1", op, plen, 1);
-          else if (1 == pop8)
+	  else if (pop8 == 1)
             {
               if (set_t != 1)
                 avr_asm_len ("set", op, plen, 1);
@@ -8396,7 +8394,7 @@ avr_out_bitop (rtx insn, rtx *xop, int *plen)
               op[1] = GEN_INT (exact_log2 (val8));
               avr_asm_len ("bld %0,%1", op, plen, 1);
             }
-          else if (8 == pop8)
+	  else if (pop8 == 8)
             {
               if (op[3] != NULL_RTX)
                 avr_asm_len ("mov %0,%3", op, plen, 1);
@@ -8419,13 +8417,13 @@ avr_out_bitop (rtx insn, rtx *xop, int *plen)
 
         case AND:
 
-          if (8 == pop8)
+	  if (pop8 == 8)
             continue;
-          else if (0 == pop8)
+	  else if (pop8 == 0)
             avr_asm_len ("clr %0", op, plen, 1);
           else if (ld_reg_p)
             avr_asm_len ("andi %0,%1", op, plen, 1);
-          else if (7 == pop8)
+	  else if (pop8 == 7)
             {
               if (set_t != 0)
                 avr_asm_len ("clt", op, plen, 1);
@@ -8447,9 +8445,9 @@ avr_out_bitop (rtx insn, rtx *xop, int *plen)
 
         case XOR:
 
-          if (0 == pop8)
+	  if (pop8 == 0)
             continue;
-          else if (8 == pop8)
+	  else if (pop8 == 8)
             avr_asm_len ("com %0", op, plen, 1);
           else if (ld_reg_p && val8 == (1 << 7))
             avr_asm_len ("subi %0,%1", op, plen, 1);
@@ -8727,9 +8725,9 @@ avr_out_fract (rtx_insn *insn, rtx operands[], bool intsigned, int *plen)
 
   bool sign_extend = src.sbit && sign_bytes;
 
-  if (0 == dest.fbit % 8 && 7 == src.fbit % 8)
+  if (dest.fbit % 8 == 0 && src.fbit % 8 == 7)
     shift = ASHIFT;
-  else if (7 == dest.fbit % 8 && 0 == src.fbit % 8)
+  else if (dest.fbit % 8 == 7 && src.fbit % 8 == 0)
     shift = ASHIFTRT;
   else if (dest.fbit % 8 == src.fbit % 8)
     shift = UNKNOWN;
@@ -9401,8 +9399,7 @@ avr_adjust_insn_length (rtx_insn *insn, int len)
      It is easier to state this in an insn attribute "adjust_len" than
      to clutter up code here...  */
 
-  if (!NONDEBUG_INSN_P (insn)
-      || -1 == recog_memoized (insn))
+  if (!NONDEBUG_INSN_P (insn) || recog_memoized (insn) == -1)
     {
       return len;
     }
@@ -10265,7 +10262,7 @@ avr_asm_init_sections (void)
      we have also to track .rodata because it is located in RAM then.  */
 
 #if defined HAVE_LD_AVR_AVRXMEGA3_RODATA_IN_FLASH
-  if (0 == avr_arch->flash_pm_offset)
+  if (avr_arch->flash_pm_offset == 0)
 #endif
     readonly_data_section->unnamed.callback = avr_output_data_section_asm_op;
   data_section->unnamed.callback = avr_output_data_section_asm_op;
@@ -10303,7 +10300,7 @@ avr_asm_named_section (const char *name, unsigned int flags, tree decl)
 
   if (!avr_need_copy_data_p
 #if defined HAVE_LD_AVR_AVRXMEGA3_RODATA_IN_FLASH
-      && 0 == avr_arch->flash_pm_offset
+      && avr_arch->flash_pm_offset == 0
 #endif
       )
     avr_need_copy_data_p = (STR_PREFIX_P (name, ".rodata")
@@ -10439,8 +10436,7 @@ avr_encode_section_info (tree decl, rtx rtl, int new_decl_p)
       /* PSTR strings are in generic space but located in flash:
          patch address space.  */
 
-      if (!AVR_TINY
-          && -1 == avr_progmem_p (decl, attr))
+      if (!AVR_TINY && avr_progmem_p (decl, attr) == -1)
         as = ADDR_SPACE_FLASH;
 
       AVR_SYMBOL_SET_ADDR_SPACE (sym, as);
@@ -10479,7 +10475,7 @@ avr_encode_section_info (tree decl, rtx rtl, int new_decl_p)
       && SYMBOL_REF_P (XEXP (rtl, 0)))
     {
       rtx sym = XEXP (rtl, 0);
-      bool progmem_p = -1 == avr_progmem_p (decl, DECL_ATTRIBUTES (decl));
+      bool progmem_p = avr_progmem_p (decl, DECL_ATTRIBUTES (decl)) == -1;
 
       if (progmem_p)
         {
@@ -12091,9 +12087,7 @@ test_hard_reg_class (enum reg_class rclass, rtx x)
 static bool
 avr_2word_insn_p (rtx_insn *insn)
 {
-  if (TARGET_SKIP_BUG
-      || !insn
-      || 2 != get_attr_length (insn))
+  if (TARGET_SKIP_BUG || !insn || get_attr_length (insn) != 2)
     {
       return false;
     }
@@ -12402,11 +12396,8 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p)
 
           if (INTVAL (lo16) == INTVAL (hi16))
             {
-              if (0 != INTVAL (lo16)
-                  || !clear_p)
-                {
-                  avr_asm_len ("movw %C0,%A0", &op[0], len, 1);
-                }
+	      if (INTVAL (lo16) != 0 || !clear_p)
+		avr_asm_len ("movw %C0,%A0", &op[0], len, 1);
 
               break;
             }
@@ -12458,7 +12449,7 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p)
 
       /* Need no clobber reg for -1: Use CLR/DEC */
 
-      if (-1 == ival[n])
+      if (ival[n] == -1)
         {
           if (!clear_p)
             avr_asm_len ("clr %0", &xdest[n], len, 1);
@@ -12466,7 +12457,7 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p)
           avr_asm_len ("dec %0", &xdest[n], len, 1);
           continue;
         }
-      else if (1 == ival[n])
+      else if (ival[n] == 1)
         {
           if (!clear_p)
             avr_asm_len ("clr %0", &xdest[n], len, 1);
@@ -13690,7 +13681,7 @@ bool
 avr_has_nibble_0xf (rtx ival)
 {
   unsigned int map = UINTVAL (ival) & GET_MODE_MASK (SImode);
-  return 0 != avr_map_metric (map, MAP_MASK_PREIMAGE_F);
+  return avr_map_metric (map, MAP_MASK_PREIMAGE_F) != 0;
 }
 
 
@@ -13757,7 +13748,7 @@ static const avr_map_op_t avr_map_op[] =
 static avr_map_op_t
 avr_map_decompose (unsigned int f, const avr_map_op_t *g, bool val_const_p)
 {
-  bool val_used_p = 0 != avr_map_metric (f, MAP_MASK_PREIMAGE_F);
+  bool val_used_p = avr_map_metric (f, MAP_MASK_PREIMAGE_F) != 0;
   avr_map_op_t f_ginv = *g;
   unsigned int ginv = g->ginv;
 
@@ -13788,13 +13779,10 @@ avr_map_decompose (unsigned int f, const avr_map_op_t *g, bool val_const_p)
 
   /* Step 2a:  Compute cost of F o G^-1  */
 
-  if (0 == avr_map_metric (f_ginv.map, MAP_NONFIXED_0_7))
-    {
-      /* The mapping consists only of fixed points and can be folded
-         to AND/OR logic in the remainder.  Reasonable cost is 3. */
-
-      f_ginv.cost = 2 + (val_used_p && !val_const_p);
-    }
+  if (avr_map_metric (f_ginv.map, MAP_NONFIXED_0_7) == 0)
+    /* The mapping consists only of fixed points and can be folded
+       to AND/OR logic in the remainder.  Reasonable cost is 3. */
+    f_ginv.cost = 2 + (val_used_p && !val_const_p);
   else
     {
       rtx xop[4];
@@ -14500,7 +14488,7 @@ avr_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *arg,
         map = TREE_INT_CST_LOW (tmap);
 
         if (TREE_CODE (tval) != INTEGER_CST
-            && 0 == avr_map_metric (map, MAP_MASK_PREIMAGE_F))
+	    && avr_map_metric (map, MAP_MASK_PREIMAGE_F) == 0)
           {
             /* There are no F in the map, i.e. 3rd operand is unused.
                Replace that argument with some constant to render
@@ -14511,7 +14499,7 @@ avr_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *arg,
           }
 
         if (TREE_CODE (tbits) != INTEGER_CST
-            && 0 == avr_map_metric (map, MAP_PREIMAGE_0_7))
+	    && avr_map_metric (map, MAP_PREIMAGE_0_7) == 0)
           {
             /* Similar for the bits to be inserted. If they are unused,
                we can just as well pass 0.  */
@@ -14550,7 +14538,7 @@ avr_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *arg,
         /* If bits don't change their position we can use vanilla logic
            to merge the two arguments.  */
 
-        if (0 == avr_map_metric (map, MAP_NONFIXED_0_7))
+	if (avr_map_metric (map, MAP_NONFIXED_0_7) == 0)
           {
             int mask_f = avr_map_metric (map, MAP_MASK_PREIMAGE_F);
             tree tres, tmask = build_int_cst (val_type, mask_f ^ 0xff);
diff --git a/gcc/config/avr/constraints.md b/gcc/config/avr/constraints.md
index c433050..226c47c 100644
--- a/gcc/config/avr/constraints.md
+++ b/gcc/config/avr/constraints.md
@@ -224,25 +224,25 @@
 (define_constraint "Y01"
   "Fixed-point or integer constant with bit representation 0x1"
   (ior (and (match_code "const_fixed")
-            (match_test "1 == INTVAL (avr_to_int_mode (op))"))
+	    (match_test "INTVAL (avr_to_int_mode (op)) == 1"))
        (match_test "satisfies_constraint_P (op)")))
 
 (define_constraint "Ym1"
   "Fixed-point or integer constant with bit representation -0x1"
   (ior (and (match_code "const_fixed")
-            (match_test "-1 == INTVAL (avr_to_int_mode (op))"))
+	    (match_test "INTVAL (avr_to_int_mode (op)) == -1"))
        (match_test "satisfies_constraint_N (op)")))
 
 (define_constraint "Y02"
   "Fixed-point or integer constant with bit representation 0x2"
   (ior (and (match_code "const_fixed")
-            (match_test "2 == INTVAL (avr_to_int_mode (op))"))
+	    (match_test "INTVAL (avr_to_int_mode (op)) == 2"))
        (match_test "satisfies_constraint_K (op)")))
 
 (define_constraint "Ym2"
   "Fixed-point or integer constant with bit representation -0x2"
   (ior (and (match_code "const_fixed")
-            (match_test "-2 == INTVAL (avr_to_int_mode (op))"))
+	    (match_test "INTVAL (avr_to_int_mode (op)) == -2"))
        (match_test "satisfies_constraint_Cm2 (op)")))
 
 (define_constraint "Yx2"
diff --git a/gcc/config/avr/driver-avr.c b/gcc/config/avr/driver-avr.c
index fe17e2d..2d3e0d5 100644
--- a/gcc/config/avr/driver-avr.c
+++ b/gcc/config/avr/driver-avr.c
@@ -59,7 +59,7 @@ avr_devicespecs_file (int argc, const char **argv)
       return X_NODEVLIB;
 
     case 1:
-      if (0 == strcmp ("device-specs", argv[0]))
+      if (strcmp ("device-specs", argv[0]) == 0)
         {
           /* FIXME:  This means "device-specs%s" from avr.h:DRIVER_SELF_SPECS
              has not been resolved to a path.  That case can occur when the
@@ -81,7 +81,7 @@ avr_devicespecs_file (int argc, const char **argv)
       // Allow specifying the same MCU more than once.
 
       for (int i = 2; i < argc; i++)
-        if (0 != strcmp (mmcu, argv[i]))
+	if (strcmp (mmcu, argv[i]) != 0)
           {
             error ("specified option %qs more than once", "-mmcu");
             return X_NODEVLIB;
diff --git a/gcc/config/avr/gen-avr-mmcu-specs.c b/gcc/config/avr/gen-avr-mmcu-specs.c
index e09f3e4..08ef166 100644
--- a/gcc/config/avr/gen-avr-mmcu-specs.c
+++ b/gcc/config/avr/gen-avr-mmcu-specs.c
@@ -55,7 +55,7 @@
 static bool
 str_prefix_p (const char *str, const char *prefix)
 {
-  return 0 == strncmp (str, prefix, strlen (prefix));
+  return strncmp (str, prefix, strlen (prefix)) == 0;
 }
 
 
@@ -133,12 +133,12 @@ print_mcu (const avr_mcu_t *mcu)
 
   FILE *f = fopen (name ,"w");
 
-  bool absdata = 0 != (mcu->dev_attribute & AVR_ISA_LDS);
-  bool errata_skip = 0 != (mcu->dev_attribute & AVR_ERRATA_SKIP);
-  bool rmw = 0 != (mcu->dev_attribute & AVR_ISA_RMW);
-  bool sp8 = 0 != (mcu->dev_attribute & AVR_SHORT_SP);
+  bool absdata = (mcu->dev_attribute & AVR_ISA_LDS) != 0;
+  bool errata_skip = (mcu->dev_attribute & AVR_ERRATA_SKIP) != 0;
+  bool rmw = (mcu->dev_attribute & AVR_ISA_RMW) != 0;
+  bool sp8 = (mcu->dev_attribute & AVR_SHORT_SP) != 0;
   bool rcall = (mcu->dev_attribute & AVR_ISA_RCALL);
-  bool is_arch = NULL == mcu->macro;
+  bool is_arch = mcu->macro == NULL;
   bool is_device = ! is_arch;
 
   if (is_arch
diff --git a/gcc/config/avr/predicates.md b/gcc/config/avr/predicates.md
index 1959b86..1147005 100644
--- a/gcc/config/avr/predicates.md
+++ b/gcc/config/avr/predicates.md
@@ -221,7 +221,7 @@
 ;; 8 or 16 or 24.
 (define_predicate "const_8_16_24_operand"
   (and (match_code "const_int")
-       (match_test "8 == INTVAL(op) || 16 == INTVAL(op) || 24 == INTVAL(op)")))
+       (match_test "INTVAL(op) == 8 || INTVAL(op) == 16 || INTVAL(op) == 24")))
 
 ;; Unsigned CONST_INT that fits in 8 bits, i.e. 0..255.
 (define_predicate "u8_operand"
diff --git a/gcc/config/cr16/cr16.c b/gcc/config/cr16/cr16.c
index 2dd30fa..364fdf4 100644
--- a/gcc/config/cr16/cr16.c
+++ b/gcc/config/cr16/cr16.c
@@ -1859,10 +1859,10 @@ cr16_create_dwarf_for_multi_push (rtx insn)
 
   for (i = current_frame_info.last_reg_to_save; i >= 0;)
     {
-      if (!current_frame_info.save_regs[i] || 0 == i || split_here)
+      if (!current_frame_info.save_regs[i] || i == 0 || split_here)
 	{
 	  /* This block of regs is pushed in one instruction.  */
-	  if (0 == i && current_frame_info.save_regs[i])
+	  if (i == 0 && current_frame_info.save_regs[i])
 	    from = 0;
 
 	  for (j = to; j >= from; --j)
diff --git a/gcc/config/cr16/cr16.h b/gcc/config/cr16/cr16.h
index b0ad34f..5c4702c 100644
--- a/gcc/config/cr16/cr16.h
+++ b/gcc/config/cr16/cr16.h
@@ -233,7 +233,7 @@ while (0)
 /* A C expression whose value is RTL representing the value of the return
    address for the frame COUNT steps up from the current frame.  */
 #define RETURN_ADDR_RTX(COUNT, FRAME) 			  		\
-  (0 == COUNT)	?  gen_rtx_PLUS (Pmode, gen_rtx_RA, gen_rtx_RA)		\
+  (COUNT == 0)	?  gen_rtx_PLUS (Pmode, gen_rtx_RA, gen_rtx_RA)		\
 		:  const0_rtx
 
 enum reg_class
@@ -293,7 +293,7 @@ enum reg_class
 	(CR16_REGNO_OK_FOR_BASE_P(REGNO)  &&	  \
 	  ((GET_MODE_SIZE (MODE) > 4  &&  	  \
 	     (REGNO) < CR16_FIRST_DWORD_REGISTER) \
-	     ? (0 == ((REGNO) & 1)) 		  \
+	     ? (((REGNO) & 1) == 0) 		  \
 	     : 1))
 
 /* TODO: For now lets not support index addressing mode.  */
diff --git a/gcc/config/cr16/cr16.md b/gcc/config/cr16/cr16.md
index 2d9f6ca..25e1041 100644
--- a/gcc/config/cr16/cr16.md
+++ b/gcc/config/cr16/cr16.md
@@ -655,8 +655,8 @@
    || register_operand (operands[1], DImode)
    || register_operand (operands[1], DFmode)"
   {
-    if (0 == which_alternative) {
-      rtx xoperands[2] ;
+    if (which_alternative == 0) {
+      rtx xoperands[2];
       int reg0 = REGNO (operands[0]);
       int reg1 = REGNO (operands[1]);
 
@@ -673,9 +673,9 @@
 	  output_asm_insn ("movd\t%1, %0", operands);
 	}}
 
-    else if (1 == which_alternative) {
-      rtx lo_operands[2] ;
-      rtx hi_operands[2] ;
+    else if (which_alternative == 1) {
+      rtx lo_operands[2];
+      rtx hi_operands[2];
 
       lo_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
       hi_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2);
@@ -688,40 +688,40 @@
       output_asm_insn ("movd\t%1, %0", lo_operands);
       output_asm_insn ("movd\t%1, %0", hi_operands);}
 
-    else if (2 == which_alternative) {
-      rtx xoperands[2] ;
-      int reg0 = REGNO (operands[0]), reg1 = -2 ;
-      rtx addr ;
+    else if (which_alternative == 2) {
+      rtx xoperands[2];
+      int reg0 = REGNO (operands[0]), reg1 = -2;
+      rtx addr;
 
 	if (MEM_P (operands[1]))
 	  addr = XEXP (operands[1], 0);
 	else
-	  addr = NULL_RTX ;
+	  addr = NULL_RTX;
 	switch (GET_CODE (addr))
 	  {
 	    case REG:
 	    case SUBREG:
 	      reg1 = REGNO (addr);
-	      break ;
+	      break;
 	    case PLUS:
 	      switch (GET_CODE (XEXP (addr, 0))) {
 		case REG:
 		case SUBREG:
 		  reg1 = REGNO (XEXP (addr, 0));
-		  break ;
+		  break;
 		case PLUS:
 		  reg1 = REGNO (XEXP (XEXP (addr, 0), 0));
-		  break ;
+		  break;
 		default:
 		  inform (DECL_SOURCE_LOCATION (cfun->decl), "unexpected expression; addr:");
 		  debug_rtx (addr);
 		  inform (DECL_SOURCE_LOCATION (cfun->decl), "operands[1]:");
 		  debug_rtx (operands[1]);
 		  inform (DECL_SOURCE_LOCATION (cfun->decl), "generated code might now work\n");
-		  break ;}
-	      break ;
+		  break;}
+	      break;
 	    default:
-	      break ;
+	      break;
 	  }
 
 	xoperands[0] = gen_rtx_REG (SImode, reg0 + 2);
@@ -739,13 +739,13 @@
 	  }}
     else
       {
-	rtx xoperands[2] ;
+	rtx xoperands[2];
 	xoperands[0] = offset_address (operands[0], GEN_INT (4), 2);
 	xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2);
 	output_asm_insn ("stord\t%1, %0", operands);
    	output_asm_insn ("stord\t%1, %0", xoperands);
       }
-    return "" ;
+    return "";
   }
   [(set_attr "length" "4, <lImmArithD>, <lImmArithD>, <lImmArithD>")]
 )
diff --git a/gcc/config/ft32/constraints.md b/gcc/config/ft32/constraints.md
index 4780315..6d2c2b4 100644
--- a/gcc/config/ft32/constraints.md
+++ b/gcc/config/ft32/constraints.md
@@ -91,7 +91,7 @@
 (define_constraint "L"
   "A 16-bit unsigned constant, multiple of 4 (-65532..0)"
   (and (match_code "const_int")
-       (match_test "-65532 <= ival && ival <= 0 && (ival & 3) == 0")))
+       (match_test "ival >= -65532 && ival <= 0 && (ival & 3) == 0")))
 
 (define_constraint "S"
   "A 20-bit signed constant (-524288..524287)"
@@ -105,9 +105,9 @@
 (define_constraint "b"
   "A constant for a bitfield width (1..16)"
   (and (match_code "const_int")
-       (match_test "1 <= ival && ival <= 16")))
+       (match_test "ival >= 1 && ival <= 16")))
 
 (define_constraint "KA"
   "A 10-bit signed constant (-512..511)"
   (and (match_code "const_int")
-       (match_test "-512 <= ival && ival <= 511")))
+       (match_test "ival >= -512 && ival <= 511")))
diff --git a/gcc/config/ft32/ft32.c b/gcc/config/ft32/ft32.c
index ddc847a..bc49963 100644
--- a/gcc/config/ft32/ft32.c
+++ b/gcc/config/ft32/ft32.c
@@ -265,12 +265,12 @@ ft32_load_immediate (rtx dst, int32_t i)
 {
   char pattern[100];
 
-  if ((-524288 <= i) && (i <= 524287))
+  if (i >= -524288 && i <= 524287)
     {
       sprintf (pattern, "ldk.l  %%0,%d", i);
       output_asm_insn (pattern, &dst);
     }
-  else if ((-536870912 <= i) && (i <= 536870911))
+  else if (i >= -536870912 && i <= 536870911)
     {
       ft32_load_immediate (dst, i >> 10);
       sprintf (pattern, "ldl.l  %%0,%%0,%d", i & 1023);
@@ -283,7 +283,7 @@ ft32_load_immediate (rtx dst, int32_t i)
       for (rd = 1; rd < 32; rd++)
         {
           u = ((u >> 31) & 1) | (u << 1);
-          if ((-524288 <= (int32_t) u) && ((int32_t) u <= 524287))
+	  if ((int32_t) u >= -524288 && (int32_t) u <= 524287)
             {
               ft32_load_immediate (dst, (int32_t) u);
               sprintf (pattern, "ror.l  %%0,%%0,%d", rd);
@@ -496,7 +496,7 @@ ft32_expand_prologue (void)
 	}
     }
 
-  if (65536 <= cfun->machine->size_for_adjusting_sp)
+  if (cfun->machine->size_for_adjusting_sp >= 65536)
     {
       error ("stack frame must be smaller than 64K");
       return;
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index c574375..88c2153 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -1267,7 +1267,7 @@ h8300_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
 	    *total = 0;
 	    return true;
 	  }
-	if (-4 <= n && n <= 4)
+	if (n >= -4 && n <= 4)
 	  {
 	    switch ((int) n)
 	      {
@@ -4171,7 +4171,7 @@ get_shift_alg (enum shift_type shift_type, enum shift_mode shift_mode,
 	      goto end;
 	    }
 	}
-      else if ((8 <= count && count <= 13)
+      else if ((count >= 8 && count <= 13)
 	       || (TARGET_H8300S && count == 14))
 	{
 	  info->remainder = count - 8;
@@ -4251,7 +4251,7 @@ get_shift_alg (enum shift_type shift_type, enum shift_mode shift_mode,
       gcc_unreachable ();
 
     case SIshift:
-      if (TARGET_H8300 && 8 <= count && count <= 9)
+      if (TARGET_H8300 && count >= 8 && count <= 9)
 	{
 	  info->remainder = count - 8;
 
@@ -4314,9 +4314,9 @@ get_shift_alg (enum shift_type shift_type, enum shift_mode shift_mode,
 	      gcc_unreachable ();
 	    }
 	}
-      else if ((TARGET_H8300 && 16 <= count && count <= 20)
-	       || (TARGET_H8300H && 16 <= count && count <= 19)
-	       || (TARGET_H8300S && 16 <= count && count <= 21))
+      else if ((TARGET_H8300 && count >= 16 && count <= 20)
+	       || (TARGET_H8300H && count >= 16 && count <= 19)
+	       || (TARGET_H8300S && count >= 16 && count <= 21))
 	{
 	  info->remainder = count - 16;
 
@@ -4353,7 +4353,7 @@ get_shift_alg (enum shift_type shift_type, enum shift_mode shift_mode,
 	      goto end;
 	    }
 	}
-      else if (TARGET_H8300 && 24 <= count && count <= 28)
+      else if (TARGET_H8300 && count >= 24 && count <= 28)
 	{
 	  info->remainder = count - 24;
 
@@ -4377,7 +4377,7 @@ get_shift_alg (enum shift_type shift_type, enum shift_mode shift_mode,
 	    }
 	}
       else if ((TARGET_H8300H && count == 24)
-	       || (TARGET_H8300S && 24 <= count && count <= 25))
+	       || (TARGET_H8300S && count >= 24 && count <= 25))
 	{
 	  info->remainder = count - 24;
 
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 82a79bd..85988cf 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3160,8 +3160,8 @@ ix86_parse_stringop_strategy_string (char *strategy_str, bool is_memset)
       if (next_range_str)
         *next_range_str++ = '\0';
 
-      if (3 != sscanf (curr_range_str, "%20[^:]:%d:%10s",
-                       alg_name, &maxs, align))
+      if (sscanf (curr_range_str, "%20[^:]:%d:%10s", alg_name, &maxs,
+		  align) != 3)
         {
 	  error ("wrong argument %qs to option %qs", curr_range_str, opt);
           return;
diff --git a/gcc/config/iq2000/iq2000.c b/gcc/config/iq2000/iq2000.c
index ee107cb..0759df1 100644
--- a/gcc/config/iq2000/iq2000.c
+++ b/gcc/config/iq2000/iq2000.c
@@ -1982,10 +1982,10 @@ iq2000_expand_prologue (void)
 	{
 	  if (next_arg == 0
 	      && DECL_NAME (cur_arg)
-	      && ((0 == strcmp (IDENTIFIER_POINTER (DECL_NAME (cur_arg)),
-				"__builtin_va_alist"))
-		  || (0 == strcmp (IDENTIFIER_POINTER (DECL_NAME (cur_arg)),
-				   "va_alist"))))
+	      && (strcmp (IDENTIFIER_POINTER (DECL_NAME (cur_arg)),
+			  "__builtin_va_alist") == 0
+		  || strcmp (IDENTIFIER_POINTER (DECL_NAME (cur_arg)),
+			     "va_alist") == 0))
 	    {
 	      last_arg_is_vararg_marker = 1;
 	      break;
diff --git a/gcc/config/m32c/m32c-pragma.c b/gcc/config/m32c/m32c-pragma.c
index c44e59c..f974b06 100644
--- a/gcc/config/m32c/m32c-pragma.c
+++ b/gcc/config/m32c/m32c-pragma.c
@@ -53,7 +53,7 @@ m32c_pragma_memregs (cpp_reader * reader ATTRIBUTE_UNUSED)
 	  if (type != CPP_EOF)
 	    warning (0, "junk at end of #pragma GCC memregs [0..16]");
 
-	  if (0 <= i && i <= 16)
+	  if (i >= 0 && i <= 16)
 	    {
 	      if (!ok_to_change_target_memregs)
 		{
diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index f6b711e..f1a465a 100644
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -517,7 +517,7 @@ m32c_conditional_register_usage (void)
 {
   int i;
 
-  if (0 <= target_memregs && target_memregs <= 16)
+  if (target_memregs >= 0 && target_memregs <= 16)
     {
       /* The command line option is bytes, but our "registers" are
 	 16-bit words.  */
@@ -2308,9 +2308,9 @@ m32c_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED,
       i = INTVAL (addr);
       if (i == 0)
 	return COSTS_N_INSNS(1);
-      if (0 < i && i <= 255)
+      if (i > 0 && i <= 255)
 	return COSTS_N_INSNS(2);
-      if (0 < i && i <= 65535)
+      if (i > 0 && i <= 65535)
 	return COSTS_N_INSNS(3);
       return COSTS_N_INSNS(4);
     case SYMBOL_REF:
@@ -2323,9 +2323,9 @@ m32c_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED,
 	  i = INTVAL (XEXP (addr, 1));
 	  if (i == 0)
 	    return COSTS_N_INSNS(1);
-	  if (0 < i && i <= 255)
+	  if (i > 0 && i <= 255)
 	    return COSTS_N_INSNS(2);
-	  if (0 < i && i <= 65535)
+	  if (i > 0 && i <= 65535)
 	    return COSTS_N_INSNS(3);
 	}
       return COSTS_N_INSNS(4);
diff --git a/gcc/config/m32c/predicates.md b/gcc/config/m32c/predicates.md
index 7423a02..de7e899 100644
--- a/gcc/config/m32c/predicates.md
+++ b/gcc/config/m32c/predicates.md
@@ -210,11 +210,11 @@
 (define_predicate "shiftcount_operand"
   (ior (match_operand 0 "mra_operand" "")
        (and (match_operand 2 "const_int_operand" "")
-	    (match_test "-8 <= INTVAL (op) && INTVAL (op) && INTVAL (op) <= 8"))))
+	    (match_test "INTVAL (op) >= -8 && INTVAL (op) && INTVAL (op) <= 8"))))
 (define_predicate "longshiftcount_operand"
   (ior (match_operand 0 "mra_operand" "")
        (and (match_operand 2 "const_int_operand" "")
-	    (match_test "-32 <= INTVAL (op) && INTVAL (op) && INTVAL (op) <= 32"))))
+	    (match_test "INTVAL (op) >= -32 && INTVAL (op) && INTVAL (op) <= 32"))))
 
 ; TRUE for r0..r3, a0..a1, or sp.
 (define_predicate "mra_or_sp_operand"
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index 9e42830..a0fab4c 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -3523,8 +3523,7 @@ output_reg_adjust (rtx reg, int n)
 {
   const char *s;
 
-  gcc_assert (GET_MODE (reg) == SImode
-	      && -12 <= n && n != 0 && n <= 12);
+  gcc_assert (GET_MODE (reg) == SImode && n >= -12 && n != 0 && n <= 12);
 
   switch (n)
     {
@@ -3566,8 +3565,7 @@ emit_reg_adjust (rtx reg1, int n)
 {
   rtx reg2;
 
-  gcc_assert (GET_MODE (reg1) == SImode
-	      && -12 <= n && n != 0 && n <= 12);
+  gcc_assert (GET_MODE (reg1) == SImode && n >= -12 && n != 0 && n <= 12);
 
   reg1 = copy_rtx (reg1);
   reg2 = copy_rtx (reg1);
diff --git a/gcc/config/nios2/nios2.c b/gcc/config/nios2/nios2.c
index f608403..1db8dec 100644
--- a/gcc/config/nios2/nios2.c
+++ b/gcc/config/nios2/nios2.c
@@ -1330,7 +1330,7 @@ nios2_handle_custom_fpu_insn_option (int fpu_insn_index)
 {
   int param = N2FPU_N (fpu_insn_index);
 
-  if (0 <= param && param <= 255)
+  if (param >= 0 && param <= 255)
     nios2_register_custom_code (param, CCS_FPU, fpu_insn_index);
 
   /* Valid values are 0-255, but also allow -1 so that the
@@ -5131,7 +5131,7 @@ static bool
 can_use_cdx_ldstw (int regno, int basereg, int offset)
 {
   if (CDX_REG_P (regno) && CDX_REG_P (basereg)
-      && (offset & 0x3) == 0 && 0 <= offset && offset < 0x40)
+      && (offset & 0x3) == 0 && offset >= 0 && offset < 0x40)
     return true;
   else if (basereg == SP_REGNO
 	   && offset >= 0 && offset < 0x80 && (offset & 0x3) == 0)
diff --git a/gcc/config/nios2/nios2.h b/gcc/config/nios2/nios2.h
index 9fdff02..e18e88e 100644
--- a/gcc/config/nios2/nios2.h
+++ b/gcc/config/nios2/nios2.h
@@ -221,7 +221,7 @@ enum reg_class
   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 
 #define CDX_REG_P(REGNO)						\
-  ((REGNO) == 16 || (REGNO) == 17 || (2 <= (REGNO) && (REGNO) <= 7))
+  ((REGNO) == 16 || (REGNO) == 17 || ((REGNO) >= 2 && (REGNO) <= 7))
 
 /* Tests for various kinds of constants used in the Nios II port.  */
 
diff --git a/gcc/config/vax/constraints.md b/gcc/config/vax/constraints.md
index 227d48a..3ac8fd6 100644
--- a/gcc/config/vax/constraints.md
+++ b/gcc/config/vax/constraints.md
@@ -25,32 +25,32 @@
 (define_constraint "U06"
    "unsigned 6 bit value (0..63)"
    (and (match_code "const_int")
-	(match_test "0 <= ival && ival < 64")))
+	(match_test "ival >= 0 && ival < 64")))
 
 (define_constraint "U08"
    "Unsigned 8 bit value"
    (and (match_code "const_int")
-	(match_test "0 <= ival && ival < 256")))
+	(match_test "ival >= 0 && ival < 256")))
 
 (define_constraint "U16"
    "Unsigned 16 bit value"
    (and (match_code "const_int")
-	(match_test "0 <= ival && ival < 65536")))
+	(match_test "ival >= 0 && ival < 65536")))
 
 (define_constraint "CN6"
    "negative 6 bit value (-63..-1)"
    (and (match_code "const_int")
-	(match_test "-63 <= ival && ival < 0")))
+	(match_test "ival >= -63 && ival < 0")))
 
 (define_constraint "S08"
    "signed 8 bit value [old]"
    (and (match_code "const_int")
-	(match_test "-128 <= ival && ival < 128")))
+	(match_test "ival >= -128 && ival < 128")))
 
 (define_constraint "S16"
    "signed 16 bit value [old]"
    (and (match_code "const_int")
-	(match_test "-32768 <= ival && ival < 32768")))
+	(match_test "ival >= -32768 && ival < 32768")))
 
 (define_constraint "I"
    "Match a CONST_INT of 0 [old]"
diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c
index 8bc40eb..f739c6f 100644
--- a/gcc/config/vax/vax.c
+++ b/gcc/config/vax/vax.c
@@ -2029,7 +2029,7 @@ adjacent_operands_p (rtx lo, rtx hi, machine_mode mode)
   if (REG_P (lo))
     return mode == SImode && REGNO (lo) + 1 == REGNO (hi);
   if (CONST_INT_P (lo))
-    return INTVAL (hi) == 0 && 0 <= INTVAL (lo) && INTVAL (lo) < 64;
+    return INTVAL (hi) == 0 && UINTVAL (lo) < 64;
   if (CONST_INT_P (lo))
     return mode != SImode;
 
diff --git a/gcc/config/visium/constraints.md b/gcc/config/visium/constraints.md
index 133b9fd..15e0beb 100644
--- a/gcc/config/visium/constraints.md
+++ b/gcc/config/visium/constraints.md
@@ -48,17 +48,17 @@
 (define_constraint "J"
   "Integer constant in the range 0 .. 65535 (16-bit immediate)"
   (and (match_code "const_int")
-       (match_test "0 <= ival && ival <= 65535")))
+       (match_test "ival >= 0 && ival <= 65535")))
 
 (define_constraint "K"
   "Integer constant in the range 1 .. 31 (5-bit immediate)"
   (and (match_code "const_int")
-       (match_test "1 <= ival && ival <= 31")))
+       (match_test "ival >= 1 && ival <= 31")))
 
 (define_constraint "L"
   "Integer constant in the range -65535 .. -1 (16-bit negative immediate)"
   (and (match_code "const_int")
-       (match_test "-65535 <= ival && ival <= -1")))
+       (match_test "ival >= -65535 && ival <= -1")))
 
 (define_constraint "M"
   "Integer constant -1"
diff --git a/gcc/config/visium/predicates.md b/gcc/config/visium/predicates.md
index a24e032..e1dd29c 100644
--- a/gcc/config/visium/predicates.md
+++ b/gcc/config/visium/predicates.md
@@ -25,7 +25,7 @@
 ;; Return true if OP is a constant in the range 1 .. 31.
 (define_predicate "const_shift_operand"
   (and (match_code "const_int")
-       (match_test "1 <= INTVAL (op) && INTVAL (op) <= 31")))
+       (match_test "INTVAL (op) >= 1 && INTVAL (op) <= 31")))
 
 ;; Return true if OP is either a register or the constant 0.
 (define_predicate "reg_or_0_operand"
diff --git a/gcc/config/visium/visium.c b/gcc/config/visium/visium.c
index 991783d..58c4e57 100644
--- a/gcc/config/visium/visium.c
+++ b/gcc/config/visium/visium.c
@@ -1922,7 +1922,7 @@ visium_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
       int offset_base = offset & ~mask;
 
       /* Check that all of the words can be accessed.  */
-      if (4 < size && 0x80 < size + offset - offset_base)
+      if (size > 4 && 0x80 < size + offset - offset_base)
 	offset_base = offset & ~0x3f;
       if (offset_base != 0 && offset_base != offset && (offset & mask1) == 0)
 	{
@@ -1968,7 +1968,7 @@ visium_legitimize_reload_address (rtx x, machine_mode mode, int opnum,
       int offset_base = offset & ~mask;
 
       /* Check that all of the words can be accessed.  */
-      if (4 < size && 0x80 < size + offset - offset_base)
+      if (size > 4 && 0x80 < size + offset - offset_base)
 	offset_base = offset & ~0x3f;
 
       if (offset_base && (offset & mask1) == 0)