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author | Kazu Hirata <kazu@cs.umass.edu> | 2004-02-18 00:11:25 +0000 |
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committer | Kazu Hirata <kazu@gcc.gnu.org> | 2004-02-18 00:11:25 +0000 |
commit | fd57a6e43f102b36f71ccd1bbf654859cc3e7bad (patch) | |
tree | 966ed56292e89026d25210e8d0427b784331713a /gcc/config | |
parent | 6a41586762030986daa00dfcfb8216efe875e5a0 (diff) | |
download | gcc-fd57a6e43f102b36f71ccd1bbf654859cc3e7bad.zip gcc-fd57a6e43f102b36f71ccd1bbf654859cc3e7bad.tar.gz gcc-fd57a6e43f102b36f71ccd1bbf654859cc3e7bad.tar.bz2 |
h8300.c (fix_bit_operand): Change the name of the last argument to "code" from "type".
* config/h8300/h8300.c (fix_bit_operand): Change the name of
the last argument to "code" from "type".
From-SVN: r78000
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/h8300/h8300.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c index 60cd068..33dc46e 100644 --- a/gcc/config/h8300/h8300.c +++ b/gcc/config/h8300/h8300.c @@ -4070,7 +4070,7 @@ compute_a_rotate_length (rtx *operands) operating insn. */ int -fix_bit_operand (rtx *operands, int what, enum rtx_code type) +fix_bit_operand (rtx *operands, int what, enum rtx_code code) { /* The bit_operand predicate accepts any memory during RTL generation, but only 'U' memory afterwards, so if this is a MEM operand, we must force @@ -4107,7 +4107,7 @@ fix_bit_operand (rtx *operands, int what, enum rtx_code type) operands[1] = force_reg (QImode, operands[1]); { rtx res = gen_reg_rtx (QImode); - switch (type) + switch (code) { case AND: emit_insn (gen_andqi3_1 (res, operands[1], operands[2])); |