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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-11-14 13:43:50 +0000 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2019-11-14 05:43:50 -0800 |
| commit | cc4defc12c7e36137786d122e2f60bef48e575f9 (patch) | |
| tree | 6c9b17795db22660070bcab55d1365a0194ed797 /gcc/config | |
| parent | fd4656a28afcf5953ae9dfeeb552d1fd951083db (diff) | |
| download | gcc-cc4defc12c7e36137786d122e2f60bef48e575f9.zip gcc-cc4defc12c7e36137786d122e2f60bef48e575f9.tar.gz gcc-cc4defc12c7e36137786d122e2f60bef48e575f9.tar.bz2 | |
aarch64: Add "c" constraint
Mirror arm in letting "c" match the condition code register.
* config/aarch64/constraints.md (c): New constraint.
From-SVN: r278223
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/aarch64/constraints.md | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md index d0c3dd5..b9e5d13 100644 --- a/gcc/config/aarch64/constraints.md +++ b/gcc/config/aarch64/constraints.md @@ -39,6 +39,10 @@ (define_register_constraint "y" "FP_LO8_REGS" "Floating point and SIMD vector registers V0 - V7.") +(define_constraint "c" + "@internal The condition code register." + (match_operand 0 "cc_register")) + (define_constraint "I" "A constant that can be used with an ADD operation." (and (match_code "const_int") |