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| author | Andreas Krebbel <krebbel1@de.ibm.com> | 2006-06-19 08:01:56 +0000 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@gcc.gnu.org> | 2006-06-19 08:01:56 +0000 |
| commit | 7e665d18088d627471f61fd2917f98ff17fccf4b (patch) | |
| tree | e0dcc326b53e7a730a7a7d0d7a93fc7f9242686e /gcc/config | |
| parent | 9b7e4f4ff8d6daf711224a406dbf0368c314d1f6 (diff) | |
| download | gcc-7e665d18088d627471f61fd2917f98ff17fccf4b.zip gcc-7e665d18088d627471f61fd2917f98ff17fccf4b.tar.gz gcc-7e665d18088d627471f61fd2917f98ff17fccf4b.tar.bz2 | |
s390.md ("doloop_si64", [...]): Add a new alternative to the constraint strings.
2006-06-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/s390.md ("doloop_si64", "doloop_si31", "doloop_di"):
Add a new alternative to the constraint strings. Add move of
operand 1 to 3 to the splitter definition.
("doloop_si_long"): Second contraint alternative removed.
From-SVN: r114767
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/s390/s390.md | 35 |
1 files changed, 19 insertions, 16 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 6459c81..d6443e0 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -6779,13 +6779,13 @@ (define_insn_and_split "doloop_si64" [(set (pc) (if_then_else - (ne (match_operand:SI 1 "register_operand" "d,d") + (ne (match_operand:SI 1 "register_operand" "d,d,d") (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d") + (set (match_operand:SI 2 "nonimmediate_operand" "=1,?X,?X") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:SI 3 "=X,&1")) + (clobber (match_scratch:SI 3 "=X,&1,&?d")) (clobber (reg:CC CC_REGNUM))] "TARGET_CPU_ZARCH" { @@ -6799,7 +6799,8 @@ "&& reload_completed && (! REG_P (operands[2]) || ! rtx_equal_p (operands[1], operands[2]))" - [(parallel [(set (reg:CCAN CC_REGNUM) + [(set (match_dup 3) (match_dup 1)) + (parallel [(set (reg:CCAN CC_REGNUM) (compare:CCAN (plus:SI (match_dup 3) (const_int -1)) (const_int 0))) (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))]) @@ -6817,13 +6818,13 @@ (define_insn_and_split "doloop_si31" [(set (pc) (if_then_else - (ne (match_operand:SI 1 "register_operand" "d,d") + (ne (match_operand:SI 1 "register_operand" "d,d,d") (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d") + (set (match_operand:SI 2 "nonimmediate_operand" "=1,?X,?X") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:SI 3 "=X,&1")) + (clobber (match_scratch:SI 3 "=X,&1,&?d")) (clobber (reg:CC CC_REGNUM))] "!TARGET_CPU_ZARCH" { @@ -6837,7 +6838,8 @@ "&& reload_completed && (! REG_P (operands[2]) || ! rtx_equal_p (operands[1], operands[2]))" - [(parallel [(set (reg:CCAN CC_REGNUM) + [(set (match_dup 3) (match_dup 1)) + (parallel [(set (reg:CCAN CC_REGNUM) (compare:CCAN (plus:SI (match_dup 3) (const_int -1)) (const_int 0))) (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))]) @@ -6858,13 +6860,13 @@ (define_insn "*doloop_si_long" [(set (pc) (if_then_else - (ne (match_operand:SI 1 "register_operand" "d,d") + (ne (match_operand:SI 1 "register_operand" "d") (const_int 1)) - (match_operand 0 "address_operand" "U,U") + (match_operand 0 "address_operand" "U") (pc))) - (set (match_operand:SI 2 "register_operand" "=1,?*m*d") + (set (match_operand:SI 2 "register_operand" "=1") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:SI 3 "=X,&1")) + (clobber (match_scratch:SI 3 "=X")) (clobber (reg:CC CC_REGNUM))] "!TARGET_CPU_ZARCH" { @@ -6882,13 +6884,13 @@ (define_insn_and_split "doloop_di" [(set (pc) (if_then_else - (ne (match_operand:DI 1 "register_operand" "d,d") + (ne (match_operand:DI 1 "register_operand" "d,d,d") (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:DI 2 "nonimmediate_operand" "=1,?*m*d") + (set (match_operand:DI 2 "nonimmediate_operand" "=1,?X,?X") (plus:DI (match_dup 1) (const_int -1))) - (clobber (match_scratch:DI 3 "=X,&1")) + (clobber (match_scratch:DI 3 "=X,&1,&?d")) (clobber (reg:CC CC_REGNUM))] "TARGET_64BIT" { @@ -6902,7 +6904,8 @@ "&& reload_completed && (! REG_P (operands[2]) || ! rtx_equal_p (operands[1], operands[2]))" - [(parallel [(set (reg:CCAN CC_REGNUM) + [(set (match_dup 3) (match_dup 1)) + (parallel [(set (reg:CCAN CC_REGNUM) (compare:CCAN (plus:DI (match_dup 3) (const_int -1)) (const_int 0))) (set (match_dup 3) (plus:DI (match_dup 3) (const_int -1)))]) |