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| author | Claudiu Zissulescu <claziss@synopsys.com> | 2019-11-22 08:59:54 +0100 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@gcc.gnu.org> | 2019-11-22 08:59:54 +0100 |
| commit | 713877cbd73783fac1a1013cefd24cc273bb4635 (patch) | |
| tree | c3b5550ab2ffe8344474dbccb1c3c093b329a1e4 /gcc/config | |
| parent | 7028c2179cc349653c5578fb5774389b1fffdaf1 (diff) | |
| download | gcc-713877cbd73783fac1a1013cefd24cc273bb4635.zip gcc-713877cbd73783fac1a1013cefd24cc273bb4635.tar.gz gcc-713877cbd73783fac1a1013cefd24cc273bb4635.tar.bz2 | |
[ARC] Fix ARC target specific tests.
Fix ARC specific tests by improving the matching pattern and adding
the missing functionality in arc.exp
gcc/tests
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/add_n-combine.c: Match add1/2/3 instruction in
output assembly.
* gcc.target/arc/arc.exp (check_effective_target_codedensity):
Add.
* gcc.target/arc/cmem-7.c: Fix matching patterns.
* gcc.target/arc/cmem-bit-1.c: Likewise.
* gcc.target/arc/cmem-bit-2.c: Likewise.
* gcc.target/arc/cmem-bit-3.c: Likewise.
* gcc.target/arc/cmem-bit-4.c: Likewise.
* gcc.target/arc/interrupt-2.c: Match rtie insn for A7.
* gcc.target/arc/store-merge-1.c: This test is only meaningful for
architectures with double load/store operations.
From-SVN: r278609
Diffstat (limited to 'gcc/config')
0 files changed, 0 insertions, 0 deletions