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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2008-10-24 23:45:02 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2008-10-24 23:45:02 +0000 |
| commit | 099590dcb65d899ffdf0c24785fb31dbdfed06cc (patch) | |
| tree | 841e64726b868ed51db543466533595a6ff847a6 /gcc/config | |
| parent | d3a5ecb5dcf6ad53d8d4256c54fca5256bfbd3bc (diff) | |
| download | gcc-099590dcb65d899ffdf0c24785fb31dbdfed06cc.zip gcc-099590dcb65d899ffdf0c24785fb31dbdfed06cc.tar.gz gcc-099590dcb65d899ffdf0c24785fb31dbdfed06cc.tar.bz2 | |
PR target/37841: Fix SPU abi
From-SVN: r141356
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/spu/spu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/gcc/config/spu/spu.h b/gcc/config/spu/spu.h index 578c742..4789c10 100644 --- a/gcc/config/spu/spu.h +++ b/gcc/config/spu/spu.h @@ -354,6 +354,14 @@ targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \ : (MODE) == VOIDmode ? 1 \ : HARD_REGNO_NREGS(CUM,MODE)) + +/* The SPU ABI wants 32/64-bit types at offset 0 in the quad-word on the + stack. 8/16-bit types should be at offsets 3/2 respectively. */ +#define FUNCTION_ARG_OFFSET(MODE, TYPE) \ +(((TYPE) && INTEGRAL_TYPE_P (TYPE) && GET_MODE_SIZE (MODE) < 4) \ + ? (4 - GET_MODE_SIZE (MODE)) \ + : 0) + #define FUNCTION_ARG_PADDING(MODE,TYPE) upward #define PAD_VARARGS_DOWN 0 |