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| author | Uros Bizjak <ubizjak@gmail.com> | 2008-12-01 14:48:52 +0100 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2008-12-01 14:48:52 +0100 |
| commit | d04dceb5ff1668e6e4bb5177f9f619f5e5fffa82 (patch) | |
| tree | c667331d49e01b6b4de3bf8926b7b75e73632ccd /gcc/config | |
| parent | d40ba0b60d7c55a72392d27f2a0cf142d37a9a3e (diff) | |
| download | gcc-d04dceb5ff1668e6e4bb5177f9f619f5e5fffa82.zip gcc-d04dceb5ff1668e6e4bb5177f9f619f5e5fffa82.tar.gz gcc-d04dceb5ff1668e6e4bb5177f9f619f5e5fffa82.tar.bz2 | |
re PR middle-end/37908 (atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand)
PR middle-end/37908
* config/alpha/alpha.c (alpha_split_atomic_op): Properly handle NAND
case by calculating ~(new_reg & val) instead of (~new_reg & val).
* config/alpha/sync.md (sync_nand<mode>): Change insn RTX
to (not:I48MODE (and:I48MODE (...))).
(sync_old_nand<mode>): Ditto.
(sync_new_nand<mode>): Ditto.
From-SVN: r142313
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/alpha/alpha.c | 7 | ||||
| -rw-r--r-- | gcc/config/alpha/sync.md | 18 |
2 files changed, 16 insertions, 9 deletions
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 3d546be..d119487 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -4466,7 +4466,12 @@ alpha_split_atomic_op (enum rtx_code code, rtx mem, rtx val, emit_load_locked (mode, before, mem); if (code == NOT) - x = gen_rtx_AND (mode, gen_rtx_NOT (mode, before), val); + { + x = gen_rtx_AND (mode, before, val); + emit_insn (gen_rtx_SET (VOIDmode, val, x)); + + x = gen_rtx_NOT (mode, val); + } else x = gen_rtx_fmt_ee (code, mode, before, val); if (after) diff --git a/gcc/config/alpha/sync.md b/gcc/config/alpha/sync.md index 5c0d284..fe8301f 100644 --- a/gcc/config/alpha/sync.md +++ b/gcc/config/alpha/sync.md @@ -89,8 +89,9 @@ (define_insn_and_split "sync_nand<mode>" [(set (match_operand:I48MODE 0 "memory_operand" "+m") (unspec:I48MODE - [(and:I48MODE (not:I48MODE (match_dup 0)) - (match_operand:I48MODE 1 "register_operand" "r"))] + [(not:I48MODE + (and:I48MODE (match_dup 0) + (match_operand:I48MODE 1 "register_operand" "r")))] UNSPEC_ATOMIC)) (clobber (match_scratch:I48MODE 2 "=&r"))] "" @@ -129,8 +130,9 @@ (match_operand:I48MODE 1 "memory_operand" "+m")) (set (match_dup 1) (unspec:I48MODE - [(and:I48MODE (not:I48MODE (match_dup 1)) - (match_operand:I48MODE 2 "register_operand" "r"))] + [(not:I48MODE + (and:I48MODE (match_dup 1) + (match_operand:I48MODE 2 "register_operand" "r")))] UNSPEC_ATOMIC)) (clobber (match_scratch:I48MODE 3 "=&r"))] "" @@ -167,12 +169,12 @@ (define_insn_and_split "sync_new_nand<mode>" [(set (match_operand:I48MODE 0 "register_operand" "=&r") - (and:I48MODE - (not:I48MODE (match_operand:I48MODE 1 "memory_operand" "+m")) - (match_operand:I48MODE 2 "register_operand" "r"))) + (not:I48MODE + (and:I48MODE (match_operand:I48MODE 1 "memory_operand" "+m") + (match_operand:I48MODE 2 "register_operand" "r")))) (set (match_dup 1) (unspec:I48MODE - [(and:I48MODE (not:I48MODE (match_dup 1)) (match_dup 2))] + [(not:I48MODE (and:I48MODE (match_dup 1) (match_dup 2)))] UNSPEC_ATOMIC)) (clobber (match_scratch:I48MODE 3 "=&r"))] "" |