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authorJakub Jelinek <jakub@redhat.com>2016-10-25 18:26:12 +0200
committerJakub Jelinek <jakub@gcc.gnu.org>2016-10-25 18:26:12 +0200
commit96592eeda1f5cb381d91ef78dea3e2666bbdb7b5 (patch)
tree9f9b788664b48c4b29fde366326af8ab3961d90f /gcc/config
parent8c78afcec88be17030623a4290f214928c143b29 (diff)
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re PR target/78102 (GCC refuses to generate PCMPEQQ instruction for SSE4.1)
PR target/78102 * optabs.def (vcondeq_optab, vec_cmpeq_optab): New optabs. * optabs.c (expand_vec_cond_expr): For comparison codes EQ_EXPR and NE_EXPR, attempt vcondeq_optab as fallback. (expand_vec_cmp_expr): For comparison codes EQ_EXPR and NE_EXPR, attempt vec_cmpeq_optab as fallback. * optabs-tree.h (expand_vec_cmp_expr_p, expand_vec_cond_expr_p): Add enum tree_code argument. * optabs-query.h (get_vec_cmp_eq_icode, get_vcond_eq_icode): New inline functions. * optabs-tree.c (expand_vec_cmp_expr_p): Add CODE argument. For CODE EQ_EXPR or NE_EXPR, attempt to use vec_cmpeq_optab as fallback. (expand_vec_cond_expr_p): Add CODE argument. For CODE EQ_EXPR or NE_EXPR, attempt to use vcondeq_optab as fallback. * tree-vect-generic.c (expand_vector_comparison, expand_vector_divmod, expand_vector_condition): Adjust expand_vec_cmp_expr_p and expand_vec_cond_expr_p callers. * tree-vect-stmts.c (vectorizable_condition, vectorizable_comparison): Likewise. * tree-vect-patterns.c (vect_recog_mixed_size_cond_pattern, check_bool_pattern, search_type_for_mask_1): Likewise. * expr.c (do_store_flag): Likewise. * doc/md.texi (@code{vec_cmpeq@var{m}@var{n}}, @code{vcondeq@var{m}@var{n}}): Document. * config/i386/sse.md (vec_cmpeqv2div2di, vcondeq<VI8F_128:mode>v2di): New expanders. testsuite/ * gcc.target/i386/pr78102.c: New test. From-SVN: r241525
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/i386/sse.md27
1 files changed, 27 insertions, 0 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index fde520f..14fcd67 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -2652,6 +2652,18 @@
DONE;
})
+(define_expand "vec_cmpeqv2div2di"
+ [(set (match_operand:V2DI 0 "register_operand")
+ (match_operator:V2DI 1 ""
+ [(match_operand:V2DI 2 "register_operand")
+ (match_operand:V2DI 3 "vector_operand")]))]
+ "TARGET_SSE4_1"
+{
+ bool ok = ix86_expand_int_vec_cmp (operands);
+ gcc_assert (ok);
+ DONE;
+})
+
(define_expand "vcond<V_512:mode><VF_512:mode>"
[(set (match_operand:V_512 0 "register_operand")
(if_then_else:V_512
@@ -11159,6 +11171,21 @@
DONE;
})
+(define_expand "vcondeq<VI8F_128:mode>v2di"
+ [(set (match_operand:VI8F_128 0 "register_operand")
+ (if_then_else:VI8F_128
+ (match_operator 3 ""
+ [(match_operand:V2DI 4 "vector_operand")
+ (match_operand:V2DI 5 "general_operand")])
+ (match_operand:VI8F_128 1)
+ (match_operand:VI8F_128 2)))]
+ "TARGET_SSE4_1"
+{
+ bool ok = ix86_expand_int_vcond (operands);
+ gcc_assert (ok);
+ DONE;
+})
+
(define_mode_iterator VEC_PERM_AVX2
[V16QI V8HI V4SI V2DI V4SF V2DF
(V32QI "TARGET_AVX2") (V16HI "TARGET_AVX2")