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author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-08-30 11:14:32 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-08-30 11:14:32 +0000 |
commit | 7cc237a633b6b488a3950baa23833b6f78e8d26b (patch) | |
tree | a44951b09715e6d11e52b297f2d81e762123ae4f /gcc/config | |
parent | 3d88d1cdf217be025628d77588e2d247feeebcb3 (diff) | |
download | gcc-7cc237a633b6b488a3950baa23833b6f78e8d26b.zip gcc-7cc237a633b6b488a3950baa23833b6f78e8d26b.tar.gz gcc-7cc237a633b6b488a3950baa23833b6f78e8d26b.tar.bz2 |
[37/77] Use scalar_int_mode when emitting cstores
cstore patterns always have a scalar integer result, which has the
value 0 for "false" and STORE_FLAG_VALUE for "true". This patch
makes that explicit using scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (cstore_mode): Return a scalar_int_mode.
* doc/tm.texi: Regenerate.
* config/sparc/sparc.c (sparc_cstore_mode): Return a scalar_int_mode.
* targhooks.h (default_cstore_mode): Likewise.
* targhooks.c (default_cstore_mode): Likewise, using a forced
conversion.
* expmed.c (emit_cstore): Expect the target of the cstore to be
a scalar_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251489
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/sparc/sparc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index a3e7e46..54adb46 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -671,7 +671,7 @@ static void sparc_print_operand_address (FILE *, machine_mode, rtx); static reg_class_t sparc_secondary_reload (bool, rtx, reg_class_t, machine_mode, secondary_reload_info *); -static machine_mode sparc_cstore_mode (enum insn_code icode); +static scalar_int_mode sparc_cstore_mode (enum insn_code icode); static void sparc_atomic_assign_expand_fenv (tree *, tree *, tree *); static bool sparc_fixed_condition_code_regs (unsigned int *, unsigned int *); static unsigned int sparc_min_arithmetic_precision (void); @@ -13170,7 +13170,7 @@ sparc_modes_tieable_p (machine_mode mode1, machine_mode mode2) /* Implement TARGET_CSTORE_MODE. */ -static machine_mode +static scalar_int_mode sparc_cstore_mode (enum insn_code icode ATTRIBUTE_UNUSED) { return (TARGET_ARCH64 ? DImode : SImode); |