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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2014-02-11 21:05:35 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2014-02-11 21:05:35 +0000 |
| commit | 69b7afeda5b28b2e3016961b8bf9f96cc2ca265c (patch) | |
| tree | 65b0125e1694ebc40016831bc46d402f63bd5dcd /gcc/config | |
| parent | 879287d96b5a37c7cc167ad792ac795075a457fd (diff) | |
| download | gcc-69b7afeda5b28b2e3016961b8bf9f96cc2ca265c.zip gcc-69b7afeda5b28b2e3016961b8bf9f96cc2ca265c.tar.gz gcc-69b7afeda5b28b2e3016961b8bf9f96cc2ca265c.tar.bz2 | |
re PR target/60137 (Code fails with -mcpu=power8 -O3 -mno-vsx)
[gcc]
2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60137
* config/rs6000/rs6000.md (128-bit GPR splitter): Add a splitter
for VSX/Altivec vectors that land in GPR registers.
[gcc/testsuite]
2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60137
* gcc.target/powerpc/pr60137.c: New file.
From-SVN: r207699
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 726b3b0..afb843a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -9963,6 +9963,15 @@ [(set_attr "length" "12") (set_attr "type" "three")]) +(define_split + [(set (match_operand:FMOVE128_GPR 0 "nonimmediate_operand" "") + (match_operand:FMOVE128_GPR 1 "input_operand" ""))] + "reload_completed + && (int_reg_operand (operands[0], <MODE>mode) + || int_reg_operand (operands[1], <MODE>mode))" + [(pc)] +{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }) + ;; Move SFmode to a VSX from a GPR register. Because scalar floating point ;; type is stored internally as double precision in the VSX registers, we have ;; to convert it from the vector format. |