aboutsummaryrefslogtreecommitdiff
path: root/gcc/config
diff options
context:
space:
mode:
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>2022-10-24 09:39:16 +0800
committerKito Cheng <kito.cheng@sifive.com>2022-10-24 10:19:29 +0800
commit65908ac84b840ded3331e000d303d0a5b4b426c8 (patch)
treeb2cf6d9b3133b3cb40db6b4731289c0c426fca19 /gcc/config
parent00716b776200c2de6813ce706d2757eec4cb2735 (diff)
downloadgcc-65908ac84b840ded3331e000d303d0a5b4b426c8.zip
gcc-65908ac84b840ded3331e000d303d0a5b4b426c8.tar.gz
gcc-65908ac84b840ded3331e000d303d0a5b4b426c8.tar.bz2
RISC-V: Fix REG_CLASS_CONTENTS.
Include V_REGS for ALL_REGS. gcc/ChangeLog: * config/riscv/riscv.h (REG_CLASS_CONTENTS): Fix ALL_REGS.
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/riscv/riscv.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index acae68e..37363e9 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -516,7 +516,7 @@ enum reg_class
{ 0x00000000, 0x00000000, 0x00000000, 0x00000001 }, /* V0_REGS */ \
{ 0x00000000, 0x00000000, 0x00000000, 0xfffffffe }, /* VNoV0_REGS */ \
{ 0x00000000, 0x00000000, 0x00000000, 0xffffffff }, /* V_REGS */ \
- { 0xffffffff, 0xffffffff, 0x00000003, 0x00000000 } /* ALL_REGS */ \
+ { 0xffffffff, 0xffffffff, 0x0000000f, 0xffffffff } /* ALL_REGS */ \
}
/* A C expression whose value is a register class containing hard