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authorJulia Koval <julia.koval@intel.com>2017-12-08 09:05:33 +0100
committerKirill Yukhin <kyukhin@gcc.gnu.org>2017-12-08 08:05:33 +0000
commit5cb7ca60332394a1afa7ed03b70d7718bf86cda3 (patch)
tree699c470185b0b40bbfdeabb957c8b3dbe55d724a /gcc/config
parent17ecc36ec4753ff04791ee660217fd62b092b3eb (diff)
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Enable VNNI support [4/5]
gcc/ * config/i386/avx512vnniintrin.h (_mm512_dpwssd_epi32, _mm512_mask_dpwssd_epi32, _mm512_maskz_dpwssd_epi32): New intrinsics. * config/i386/avx512vnnivlintrin.h (_mm256_dpwssd_epi32, _mm256_mask_dpwssd_epi32, _mm256_maskz_dpwssd_epi32, _mm_dpwssd_epi32, _mm_mask_dpwssd_epi32, _mm_maskz_dpwssd_epi32): Ditto. gcc/testsuite/ * gcc.target/i386/avx512f-vnni-1.c: Add vdpwssd checks. * gcc.target/i386/avx512vl-vnni-1.c: Ditto. * gcc.target/i386/avx512f-vpdpwssd-2.c: New. * gcc.target/i386/avx512vl-vpdpwssd-2.c: Ditto. From-SVN: r255496
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/i386/avx512vnniintrin.h25
-rw-r--r--gcc/config/i386/avx512vnnivlintrin.h48
2 files changed, 73 insertions, 0 deletions
diff --git a/gcc/config/i386/avx512vnniintrin.h b/gcc/config/i386/avx512vnniintrin.h
index c9842f3..c435dc1 100644
--- a/gcc/config/i386/avx512vnniintrin.h
+++ b/gcc/config/i386/avx512vnniintrin.h
@@ -85,6 +85,31 @@ _mm512_maskz_dpbusds_epi32 (__mmask16 __A, __m512i __B, __m512i __C,
(__v16si) __C, (__v16si) __D, (__mmask16)__A);
}
+extern __inline __m512i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_dpwssd_epi32 (__m512i __A, __m512i __B, __m512i __C)
+{
+ return (__m512i) __builtin_ia32_vpdpwssd_v16si ((__v16si)__A, (__v16si) __B,
+ (__v16si) __C);
+}
+
+extern __inline __m512i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_dpwssd_epi32 (__m512i __A, __mmask16 __B, __m512i __C, __m512i __D)
+{
+ return (__m512i)__builtin_ia32_vpdpwssd_v16si_mask ((__v16si)__A,
+ (__v16si) __C, (__v16si) __D, (__mmask16)__B);
+}
+
+extern __inline __m512i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_maskz_dpwssd_epi32 (__mmask16 __A, __m512i __B, __m512i __C,
+ __m512i __D)
+{
+ return (__m512i)__builtin_ia32_vpdpwssd_v16si_maskz ((__v16si)__B,
+ (__v16si) __C, (__v16si) __D, (__mmask16)__A);
+}
+
#ifdef __DISABLE_AVX512VNNI__
#undef __DISABLE_AVX512VNNI__
#pragma GCC pop_options
diff --git a/gcc/config/i386/avx512vnnivlintrin.h b/gcc/config/i386/avx512vnnivlintrin.h
index 621f0ac..d87feaa 100644
--- a/gcc/config/i386/avx512vnnivlintrin.h
+++ b/gcc/config/i386/avx512vnnivlintrin.h
@@ -131,6 +131,54 @@ _mm_maskz_dpbusds_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
(__v4si) __C, (__v4si) __D, (__mmask8)__A);
}
+extern __inline __m256i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_dpwssd_epi32 (__m256i __A, __m256i __B, __m256i __C)
+{
+ return (__m256i) __builtin_ia32_vpdpwssd_v8si ((__v8si)__A, (__v8si) __B,
+ (__v8si) __C);
+}
+
+extern __inline __m256i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_dpwssd_epi32 (__m256i __A, __mmask8 __B, __m256i __C, __m256i __D)
+{
+ return (__m256i)__builtin_ia32_vpdpwssd_v8si_mask ((__v8si)__A, (__v8si) __C,
+ (__v8si) __D, (__mmask8)__B);
+}
+
+extern __inline __m256i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_dpwssd_epi32 (__mmask8 __A, __m256i __B, __m256i __C, __m256i __D)
+{
+ return (__m256i)__builtin_ia32_vpdpwssd_v8si_maskz ((__v8si)__B,
+ (__v8si) __C, (__v8si) __D, (__mmask8)__A);
+}
+
+extern __inline __m128i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_dpwssd_epi32 (__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_vpdpwssd_v4si ((__v4si)__A, (__v4si) __B,
+ (__v4si) __C);
+}
+
+extern __inline __m128i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_dpwssd_epi32 (__m128i __A, __mmask8 __B, __m128i __C, __m128i __D)
+{
+ return (__m128i)__builtin_ia32_vpdpwssd_v4si_mask ((__v4si)__A, (__v4si) __C,
+ (__v4si) __D, (__mmask8)__B);
+}
+
+extern __inline __m128i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskz_dpwssd_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
+{
+ return (__m128i)__builtin_ia32_vpdpwssd_v4si_maskz ((__v4si)__B,
+ (__v4si) __C, (__v4si) __D, (__mmask8)__A);
+}
+
#ifdef __DISABLE_AVX512VNNIVL__
#undef __DISABLE_AVX512VNNIVL__
#pragma GCC pop_options