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author | Uros Bizjak <ubizjak@gmail.com> | 2010-10-22 18:12:57 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2010-10-22 18:12:57 +0200 |
commit | 5ab2c5cb69db963a15fee5fca519db220310230d (patch) | |
tree | 21bd8d1669024e370f4ab90cdaf81b0b4203f8d1 /gcc/config | |
parent | 4e8859d2addc905a7df2bc0e2193a4ea84500bcd (diff) | |
download | gcc-5ab2c5cb69db963a15fee5fca519db220310230d.zip gcc-5ab2c5cb69db963a15fee5fca519db220310230d.tar.gz gcc-5ab2c5cb69db963a15fee5fca519db220310230d.tar.bz2 |
re PR target/46098 (ICE: in extract_insn, at recog.c:2100 with -msse3 -ffloat-store and __builtin_ia32_loadupd())
PR target/46098
* config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
(avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
(*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
(<sse>_movu<ssemodesuffix>): New expander.
(*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
(avx_movdqu<avxmodesuffix>): New expander.
(*sse2_movdqu): Rename from sse2_movdqu.
(sse2_movdqu): New expander.
testsuite/ChangeLog:
PR target/46098
* gcc.target/i386/pr46098.c: New test.
From-SVN: r165845
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/i386/sse.md | 51 |
1 files changed, 47 insertions, 4 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 635a460..362659a 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -382,7 +382,18 @@ DONE; }) -(define_insn "avx_movu<ssemodesuffix><avxmodesuffix>" +(define_expand "avx_movu<ssemodesuffix><avxmodesuffix>" + [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "") + (unspec:AVXMODEF2P + [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "")] + UNSPEC_MOVU))] + "AVX_VEC_FLOAT_MODE_P (<MODE>mode)" +{ + if (MEM_P (operands[0]) && MEM_P (operands[1])) + operands[1] = force_reg (<MODE>mode, operands[1]); +}) + +(define_insn "*avx_movu<ssemodesuffix><avxmodesuffix>" [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "=x,m") (unspec:AVXMODEF2P [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "xm,x")] @@ -408,7 +419,18 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "TI")]) -(define_insn "<sse>_movu<ssemodesuffix>" +(define_expand "<sse>_movu<ssemodesuffix>" + [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "") + (unspec:SSEMODEF2P + [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "")] + UNSPEC_MOVU))] + "SSE_VEC_FLOAT_MODE_P (<MODE>mode)" +{ + if (MEM_P (operands[0]) && MEM_P (operands[1])) + operands[1] = force_reg (<MODE>mode, operands[1]); +}) + +(define_insn "*<sse>_movu<ssemodesuffix>" [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "=x,m") (unspec:SSEMODEF2P [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "xm,x")] @@ -420,7 +442,18 @@ (set_attr "movu" "1") (set_attr "mode" "<MODE>")]) -(define_insn "avx_movdqu<avxmodesuffix>" +(define_expand "avx_movdqu<avxmodesuffix>" + [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "") + (unspec:AVXMODEQI + [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "")] + UNSPEC_MOVU))] + "TARGET_AVX" +{ + if (MEM_P (operands[0]) && MEM_P (operands[1])) + operands[1] = force_reg (<MODE>mode, operands[1]); +}) + +(define_insn "*avx_movdqu<avxmodesuffix>" [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "=x,m") (unspec:AVXMODEQI [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "xm,x")] @@ -432,7 +465,17 @@ (set_attr "prefix" "vex") (set_attr "mode" "<avxvecmode>")]) -(define_insn "sse2_movdqu" +(define_expand "sse2_movdqu" + [(set (match_operand:V16QI 0 "nonimmediate_operand" "") + (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "")] + UNSPEC_MOVU))] + "TARGET_SSE2" +{ + if (MEM_P (operands[0]) && MEM_P (operands[1])) + operands[1] = force_reg (V16QImode, operands[1]); +}) + +(define_insn "*sse2_movdqu" [(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m") (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "xm,x")] UNSPEC_MOVU))] |