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| author | Richard Sandiford <rsandifo@redhat.com> | 2002-12-15 11:34:17 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2002-12-15 11:34:17 +0000 |
| commit | 46b192aea836eeaaba513d7d3f7ab19a0271565f (patch) | |
| tree | c8ddfcd1f936f6ef34a5c20138fca75610c0f84d /gcc/config | |
| parent | 7bd439354874fc24cbbf6b569e3cc865c1939ecb (diff) | |
| download | gcc-46b192aea836eeaaba513d7d3f7ab19a0271565f.zip gcc-46b192aea836eeaaba513d7d3f7ab19a0271565f.tar.gz gcc-46b192aea836eeaaba513d7d3f7ab19a0271565f.tar.bz2 | |
* config/mips/mips.md: Disable the movstrsi define_split.
From-SVN: r60156
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/mips/mips.md | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index cc6cda5..05fdabe 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -6550,6 +6550,12 @@ move\\t%0,%z4\\n\\ ;; fill a delay slot. This also prevents a bug in delayed branches ;; from showing up, which reuses one of the registers in our clobbers. +;; ??? Disabled because it doesn't preserve alias information for +;; operands 0 and 1. Also, the rtl for the second insn doesn't mention +;; that it uses the registers clobbered by the first. +;; +;; It would probably be better to split the block into individual +;; instructions so that the scheduler can do more with it. (define_split [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) (mem:BLK (match_operand:SI 1 "register_operand" ""))) @@ -6561,7 +6567,7 @@ move\\t%0,%z4\\n\\ (use (match_operand:SI 3 "small_int" "")) (use (const_int 0))] - "reload_completed && !TARGET_DEBUG_D_MODE && INTVAL (operands[2]) > 0" + "reload_completed && 0 && INTVAL (operands[2]) > 0" ;; All but the last move [(parallel [(set (mem:BLK (match_dup 0)) |